PIC18FxxQ43 Version of DT_INTS


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  1. #1
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    Default PIC18FxxQ43 Version of DT_INTS

    A fine Aussie asked me to generate a DT_INTS for the new Q43 series. It has been bench tested with TMR0 and TMR2. My assumption is that if they work, the mechanicals are working, and everything else should work.

    Attached is "working" code for DT_INTS-Q43. It uses the standard ReEnterPBP-18.bas and functions just like previous versions. You must make sure "MVECEN = OFF" in the CONFIG.

    Changes:
    1 - Access Bank is BANK4 in the Q43, not BANK0
    2 - INTCON is INTCON0
    3 - All possible Interrupts are listed along with various #definitions, all non-existent Interrupts have been removed
    4 - ASM movff Commands changed to movffl to work with the extended Memory range
    5 - INTCON0.PIE doesn't exist, I just commented it out.

    Due to #5, this probably only works with all Interrupts used as High Priority. I tested it with TMR0 and TMR2 only. The mechanics work, so I assume all Interrupts will work. Try it and let me know if something isn't working properly. I find it curious that I had to add ".txt" to get this forum to accept it as a valid upload! Remove the .txt to use it.

    DT_INTS-Q43.pbp.txt

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    I forgot to mention, the PIC18F27_47_57Q43.PBPINC files incorrectly list BANK36 with the same address range as BANK26. Remove the .txt from the attached file name and include the appropriate file in your project folder. PBP will look for it in the project folder first, then the C:// last. Since there is no BANK36 in the smaller 25_26_45_46_55_56Q43 chips, they are good to go. Charles assures me that that is what he received from Microchip and it wasn't a mistake copying from the Data Sheet.

    PIC18F27Q43.PBPINC.txt
    PIC18F47Q43.PBPINC.txt
    PIC18F57Q43.PBPINC.txt

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    I put a copy of this in the User Example code area

    http://www.picbasic.co.uk/forum/content.php?r=71

    though it might be better in the DT Book of interrupts micro site

    http://dt.picbasic.co.uk/
    Lester - Forum Administrator
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    www.crownhill.co.uk

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    Crap! It was pointed out by tumbleweed on the ME Labs site that the ACCESS BANK is BANK5, not BANK4. I made that and a few other changes and have a revised version with an appended _1 in the name.

    DT_INTS-Q43_1.pbp.txt

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    thanks mike

    your efforts on this is very much appriciated

    cheers

    sheldon

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    Default Re: PIC18FxxQ43 Version of DT_INTS - UPDATE V3.42

    hI GUYS

    with Help from both Mike and Tubbleweed , an updated version of DT_INTs _Q43 has been done

    This version is only for use on the Q43 chip as it now requires Q43's feature that saves/ restores the INTs priority using its internal stack , not varables previously provided in the DT_ints include
    Please refer to the version notes in the attached file

    this inlcude is in Code under test uses the following high / low priorty interupts for my code for the following INTs for information
    tested using PBP3.1.5 for compile

    HIgh priority
    Timer 1
    Timer 2
    Timer 3

    Low priorty
    Timer 0
    IOC Int - portb
    U2 INt ( inputs

    if you find errors please post

    Regards

    Sheldon
    Attached Files Attached Files

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    Hi guys

    finally got the samples of 18f47q43 and mounted on the pcb i have

    starting to test the ints_18_q43 version

    i am doing a test on the timer0 as a high priority and then as a low priority

    set as a high priory timer0 works

    but set as low priority the chip crashes

    compiles ok and asm looks good to generate the priority levels

    mike can you see if you see something i have done incorrectly in the include

    i am wondering if the fast register save is affecting the re-enter_lp.bas include
    Attached Files Attached Files
    Last edited by longpole001; - 8th June 2022 at 15:15.

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    i am wondering if the fast register save is affecting the re-enter_lp.bas include
    Could be, but I don't have any PBP version even remotely up to date to test it with.

    Could you post the .lst and .hex files that go along with that?

    One thing I never see... the INTCON0.GIE bit needs to be set, and I only see that happening if there's a high-priority intr defined.
    you can't have just a low-priority interrupt. If GIE = 0 then all interrupts are shut off.

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    part of asm listing

    have included the hex and list files


    Code:
     C:\USERS\SMW OFFICE\DOCUMENTS\MY PIC PROJECTS\K9 GTS PROJECT\PIC BASIC CODE\WORKING FILES\K9 LED CONTROLLER\VER 1.0 PCB\VER 1.3 DEV\LED DISPLAY BASE\DT_INTS-18_Q43.BAS	00678	ASM
    
    	ASM?
    
    INT_CREATE_L  macro
      local OverCREATE
        goto OverCREATE
        ifdef USE_LOWPRIORITY
            if (USE_LOWPRIORITY != 1)
           error "'DEFINE USE_LOWPRIORITY 1' required for Low Priority Interrupts"
            endif
        else
           error "'DEFINE USE_LOWPRIORITY 1' required for Low Priority Interrupts"
        endif
    Priority = L
    INT_ENTRY_L  
      bcf      _InHPint, 0    
    List_Start_L
      clrf  BSR
    PREV_BANK = 5
     RETFIE  1
        bcf      _Serviced_L, 0
        ifdef INT_LIST_L
            INT_LIST_L                  ; Expand the users list of HP INT handlers
        else
            error "INT_CREATE_L - INT_LIST_L not defined, can not create"
        endif
        btfsc    _Serviced_L, 0         ; if anything was serviced
        goto     List_Start_L           ; go around, and check again
    
        ifdef ReEnterLPused             ; was ReEnterPBP-18LP.bas included
            GetAddress21  INT_EXIT_L, RetAddrL
            L?GOTO   _RestorePBP_L      ; Restore PBP system Vars
        endif
    
    INT_EXIT_L
    PREV_BANK = 5
        retfie   FAST                    ; Return from Interrupt
    OverCREATE
        bsf  INTCON0, IPEN_INTCON0, 0 ; Enable Interrupt Priorities
        bsf   INTCON0,GIEL, 0         ; Enable Low Priority Interrupts
      endm
    
    
    	ENDASM?
    Attached Files Attached Files

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    I don't see anything wrong with ReEnterPBP-18LP.bas, but there are a few other things I noticed.

    First off, as I said, you can't have just a low-priority interrupt.
    If you don't define a high-priority one then INTCON0.GIE never gets set, and if GIE is 0 then you get no interrupts period.
    If you only have one interrupt it must be high-priority.

    Next, there's an issue with the INT_ENABLE macro.
    The lines that setup the priority bits in the IRPx registers assume that the registers are in the access bank, and they're not.
    Code:
    if (Priority == H)
        bsf  INT_Priority_Reg, INT_Priority_Bit, 0
    else
        if (Priority == L)
            bcf  INT_Priority_Reg, INT_Priority_Bit, 0
    The ", 0" at the end of those lines tell the assembler to use the access bank instead of the BSR bank select register.
    In the Q43, the IRP registers are in bank 3, so they can't use the SFR access bank (bank 4).
    Those instructions need a BANKSEL before them, remove the ", 0", and don't forget to put the BSR register back afterwards.
    Something like this ought to work...
    Code:
    if (INT_Priority_Reg != -1)
        if (Priority == H)
            movf BSR, 0			; save current BSR in WREG
    	banksel INT_Priority_Reg 
            bsf  INT_Priority_Reg, INT_Priority_Bit
            movwf BSR           ; restore BSR
        else
            if (Priority == L)
    	    movf BSR, 0			; save current BSR in WREG
                banksel INT_Priority_Reg 
    	    bcf  INT_Priority_Reg, INT_Priority_Bit
                movwf BSR           ; restore BSR
    	else
                error "INT_ENABLE - Invalid Priority Specified"
            endif
        endif
    else

    Finally, in the INT_CREATE_H macro, the line following OverCREATE comments out PEIE... that should be uncommented.
    Otherwise, if you're not using priorities you'll never get a peripheral interrupt.
    Code:
    OverCREATE
        bsf   INTCON0,GIE, 0             ; Enable High Priority Interrupts
    ;    bsf   INTCON0,PEIE, 0            ; Enable Peripheral Interrupts
      endm
    should be:
    Code:
    OverCREATE
        bsf   INTCON0,GIE, 0             ; Enable High Priority Interrupts
        bsf   INTCON0,PEIE, 0            ; Enable Peripheral Interrupts
      endm

  11. #11


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    Default Re: PIC18FxxQ43 Version of DT_INTS

    ... and one I forgot.

    In your Timer0_Count routine, stop messing around with the PIE bits. You can't get another TMR0 interrupt while you're already inside the ISR.
    Code:
     Timer0_Count:
      ' PIE0.5 = 0                   ' K40 Stop Timer 0 interupt
       ' PIE3.7 = 0                   ' Q43 Stop Timer 0 interupt 
       '======= DEBUG =========  
       if Internal_Cal = 1 then 
          LATA.2 = ~LATA.2              ' DEBUG OF TIMER0 INTERVLES  hub_c pin ( 1/4scan panels Hub_c not used) 
       endif 
       '------------------------
     
        TMR0H = $63               ' preset Timer 0 to a 10ms timer
        TMR0L = $C0                              
       
      '  PIE0.5 = 1                ' K40 Start Timer 0 interupt - TMR0IF
     '    PIR3.7 = 1 ' Q43 CLEAR THE INTERUPT 
      '   PIE3.7 = 1                ' Q43 Start Timer 0 interupt  
    @ INT_RETURN
        RETURN

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    thanks tumbleweed

    ill put those changes in and test

    i will put timer1 as high and timer0 as low , as per what i actually need , in the end code

    this test will use 6 interrupts timer0-timer3, IOC , Usart2 and i am finding k40 hangover settings that i did change over still

    ill place an updated int-18_q43 include as tests complete

    cheers


    sheldon

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    here is the modified include q43 ints code with tumbleweeds fixes to the high /low priority

    version code 3.43 -

    tumbleweed please check that the changes have been done correctly

    testing continues tomorrow

    cheers

    sheldon
    Attached Files Attached Files

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    you get a compile error if this is not commented out
    there is no PEIE flag in INTCON0

    only IPEN



    remove comment out
    ; bsf INTCON0,PEIE, 0 ; Enable Peripheral Interrupts

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    mmm well still a problem for low priority interrupts
    if low priority interrupt are enable, it stops devices on high priority as well

    see attached code for test
    Attached Files Attached Files

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    you get a compile error if this is not commented out
    there is no PEIE flag in INTCON0
    Oops, that one's on me! I forgot that they re-arranged things with the new VIC module and there's only GIE/GIEH and GIEL.
    You can just kill that line.


    I'm gonna have to take a closer look at the files you sent.
    There's no code getting into the output file for the low-priority stuff...

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    In your main file you need to uncomment the 'define use_lowpriority' and rearrange the DT-INTS setup section.

    Try:
    Code:
       ' ---------- Set up DT_INTS-18 Routine for Instant Interrupt handling   -----------
       DEFINE USE_LOWPRIORITY  1   ' Include if using Low Pr. PBP INTS
     
       ' ****** include Placed here becuase of pin varables and routine varable needed to be set first  *******  
       INCLUDE "DT_INTS-18_Q43.bas"                  ; Base Interrupt System for 18FxxQ43 processors  ( DT_INTS-18_3_42.BAS)
       INCLUDE "ReEnterPBP-18.bas"                   ; Include if using PBP interrupts
       INCLUDE "ReEnterPBP-18LP.bas"                 ; Include if using Low Priority PBP INTS
     '------------------------------------------------------------------------------
    
      INCLUDE "modedefs.bas"                        ' Required for shiftout,shiftin commands as defined symbols
    
     ;----[High Priority Interrupts]-----------------------------------------------
    ASM
    INT_LIST macro	; IntSource,         Label, Type, ResetFlag?
       INT_Handler TMR1_INT, _EL_ClockCount,PBP,yes      ; Call ClockCount  subroutine in K9_Elapsed_INT-18.bas
    ;   INT_Handler TMR3_INT, _Show_Display, PBP,yes      ; Call Display Show for LED Modules in   
    ;   INT_Handler TMR2_INT, _Bright_Ctrl,  PBP,yes      ; call Brightness Control for display module 
     endm
     INT_CREATE				; Creates the High Priority interrupt processor
     
    ;----[Low Priority Interrupts]------------------------------------------------
    INT_LIST_L  macro  ; IntSource,        Label,  Type, ResetFlag?
       INT_Handler TMR0_INT, _Timer0_Count, PBP,yes      ; call Timer0_Count subroutine
    ;   INT_Handler  IOC_INT, _Rx_mode_IOC,  PBP,yes      ; Call Rx_mode_IOC subroutine for RF RX_mode
    ;   INT_Handler  U2_INT,  _Term_RX,      PBP,yes      ; Q43 - Call Term_input for terminal char buffer  
      ; INT_Handler  RX2_INT, _Term_RX,      PBP,yes      ; K40 - Call Term_input for terminal char buffer  
     endm
     INT_CREATE_L                            ; Creates the Low Priority interrupt processor
    ENDASM

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    sorry tubbleweed for the confusion ,
    i had uncommented all the low priority commands required and tested for the failure

    but then re removed the low priority for checking it worked , then sent the files ,

    put it down to being 1AM when i was doing the changes

    here is the files with the low priority commands in place and the files results

    cheers


    sheldon
    Attached Files Attached Files

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    From what I can tell the basic interrupt structure looks to be ok.
    Unfortunately, the way the various files are written, all of the ReEnterPBP routines don't appear in the .lst files, so it makes tracking what they're doing next to impossible.

    When you have ReEnterPBP-18 and ReEnterPBP-18LP together they use a boatload of ram, over 136 bytes for the PBP context.
    That puts many of the variables outside the access bank, so it's possible there's a bank select issue in there somewhere.

  20. #20
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    Default Re: PIC18FxxQ43 Version of DT_INTS

    i am finding some other issues with bank access with other asm code i have , that is not happy on q43

    thinking that what you did with
    -----------
    movf BSR, 0
    banksel INT_Priority_Reg
    bsf INT_Priority_Reg, INT_Priority_Bit
    movwf BSR
    -----------

    historic code i use for elasped timer to get the cycles constant and limited may now work against q43 chip ??

    i may be wrong as my asm really sucks but each command that has BCF will need a banksel , bsf ????

    having trouble with load of timer1 using asm on the q43

    but doing that change would add cycles i am sure

    i hope i am wrong


    Code:
     ASM
                                     ; 16.368mhz tcxo = 61.0948ns clock       16.00Mhz = 62.5 ( internal osc used currenlty 20/2/20)
    TimerConst = 40912               ; 40912 + 8 cycle instrution load = 40920 x 61.0948ns = 2.499999216mS  timer 1 clock tick   (  16mhz int = 39992 + 8cycle = 40000 x 62.5ns = 2.5ms) 
    TimerConst = 65536 - TimerConst  ; set value for timer1 preload
                                                               
    ;-----------------  ADD TimerConst to TMR1H:TMR1L -------------------------
    ADD2_TIMER   macro
         BCF     T1CON,TMR1ON, 0       ;  1 Turn off timer
         MOVLW   LOW(TimerConst)       ;  1
         ADDWF   TMR1L,F, 0            ;  1    
         BTFSC   STATUS,C              ;  1/2
         INCF    TMR1H,F, 0            ;  1
         MOVLW   HIGH(TimerConst)      ;  1
         ADDWF   TMR1H,F, 0            ;  1
         endm
    
    ; -----------------  ADD TimerConst to TMR1H:TMR1L and restart TIMER1 ------
    RELOAD_TIMER  macro
         ADD2_TIMER
         BSF     T1CON,TMR1ON, 0       ;  1   Turn TIMER1 back on  (8 cycles)
         endm
    
    ; -----------------  Load TimerConst into TMR1H:TMR1L ----------------------
    LOAD_TIMER  macro
         MOVE?CT  0, T1CON,TMR1ON
         MOVE?CB  0, TMR1L
         MOVE?CB  0, TMR1H
         ADD2_TIMER
         endm
     ENDASM

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    On the Q43 (and most recent PIC18's with the VIC), the SFR registers have been moved down in memory starting at BANK 0,
    so general purpose RAM no longer starts there. The access bank used to be part of that, but no more.

    For the Q43, the access RAM is now at 0x500-0x55F, and the SFR access bank is 0x460-0x4FF.
    Anything located outside those addresses require the bank select register (BSR) to be set appropriately.

    Many asm instructions have a ", a" field at the end, where 'a' specifies the RAM access bit:
    a = 0: RAM location in Access RAM (BSR register is ignored)
    a = 1: RAM bank is specified by BSR register

    The TMR1 registers are located in bank 3, so you can't use asm instructions that end in ", 0" to access them.
    You'd have to set the BSR with a 'movlb' (or use mpasm 'BANKSEL reg') and change the ", 0" to ", 1" (or drop it off).
    If you don't specify the ", a" part MPASM is usually pretty good at figuring out when it needs a = ", 0", or ", 1", but it's up to you to set the BSR if needed.

    Datasheet sections 44 (Instruction Set Summary) and section 46 (Register Summary) have all the info you need, once you get your head wrapped around how it works.


    So, looking at your timer macros LOAD_TIMER is probably ok since the 'MOVE?xx' macros set the BSR, but if the other two are used on their own they'll need to change (adding instructions which will change the timing).

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    ok tubleweed ,

    will try some add in commands for timer 1

    hope you shine a light on the low priority ints problem

    cheers

    sheldon

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    Hi guys

    is there any further tests i can do to help solve the low priory ints problem on the q43 chip

    cheers

    sheldon

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    Not really that I can think of.

    I thought I'd try and load it into MPLABX so I could debug it, but it's been so long since I've used it w/PBP I can't seem to get the two so I can build and debug in MPLABX.
    Using MPLABX 5.35 w/ PBP 3.1.4, a simple blinky program builds ok with the commandline, but even though it builds in MPLABX it fails the MPLABX make process so it won't load it.

    I don't remember what makes the two happy...

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    I don't remember what makes the two happy...
    You need to travel back in time ten years , last known semi workable setup was with mplabx 2.35
    Warning I'm not a teacher , prose like a gushing embroilment is not my style

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    Default Re: PIC18FxxQ43 Version of DT_INTS

    I don't need the editor to work or anything... just be able to compile and load it so I can debug, even at the asm level.
    I thought that part still worked, but maybe I'll try treating it as an asm project and do it that way.

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