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  1. #1
    Join Date
    Sep 2019

    Default Unequal Timer0 count in interrupt mode.

    Hi all! Please help me to fix the issue with unequal Timer0 count in interrupt mode. Please check the picture to see the gaps between pulses.


    The source code:

    DEFINE LOADER_USED 1 'Define loader
    DEFINE OSC 4 'Define oscillator

    DEFINE HSER_RCSTA 90h 'Enable the receive register
    DEFINE HSER_TXSTA 20h 'Enable the transmit register
    DEFINE SER_BAUD 9600 'Set the baud rate
    DEFINE HSER_BAUD 9600 'Set the baud rate

    TRISB.3 = 0

    INTCON = 100000 'Enable TMR0 interrupts
    OPTION_REG = 000110 'Set prescaler 1:128
    TMR0 = 175 'Load TMR0 register


    loop: 'Short code
    PORTB.3 = 1 'Short code
    GOTO loop 'Short code

    DISABLE 'Disable interrupts
    ISR: 'Entry point of the ISR
    TMR0 = 175 'Load TMR0 register
    HSEROUT [$F8] 'Send a byte
    INTCON.2 = 0 'Reset INT0IF flag
    RESUME 'Resume main program
    ENABLE 'Enable interrupts

  2. #2
    Join Date
    Aug 2003

    Default Re: Unequal Timer0 count in interrupt mode.

    Without your image I’d have gone for watchdog timer reset, but obviously not with that timing.

    Than I looked harder, and Oh no! PBP interrupt!
    PBP Interrupts: Like an interrupt, only it isn’t.

    You’re a real user though, they should ditch your under review status.

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