PPS understanding on 16F15313


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  1. #1
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    Default PPS understanding on 16F15313

    Hi All,

    I've been struggling to understand Peripheral Pin Select (PPS). Tried once on a 16F18624 and gave up. Trying to understand it again, as it seems like all the current chips are going that way and it would be a wonderful feature to master. Currently I could use it on a 16F15313 and I'm unsure if I'm doing it right.

    I have found the PBP3_PPS_notes.txt file, looked at the TB3130 Tech Brief, and looked for clarification in the datasheet, but I'm not seeing evidence that I'm implementing it correctly. Specifically I need one of the CCP modules for capturing a pulse on PORTA.0, and the other CCP to generate PWM on PORTA.2.

    Side note: my program is using DT_INTs, but I don't see why that would change things. I'm creating the INT_Handler for CCP1 after the defines.

    Code:
    .....
    DEFINE CCP1_REG PORTA      ' capture pulse on RA.0 (pin 7)
    DEFINE CCP1_BIT 0
    DEFINE CCP2_REG PORTA      ' generate HPWM on RA.2 (pin5)
    DEFINE CCP2_BIT 2
    .....
    If I understand it correctly, that should do it. So far I'm only trying to capture the pulse on RA.0, but not having success.
    I'll continue to try and devise a method to test this, but if someone has any clarifications, it sure would help.

    Thanks
    bo

  2. #2
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    Default Re: PPS understanding on 16F15313

    bo
    i'm not a 3.1 user but from all i have seen those defines only refer to the hpwm command

    i don't have access to the PBP3_PPS_notes.txt notes file either, so does it reference to ccp capture mode at all ?

    i would set porta.0 to digital and input mode and ccp1pps to use ra.0 manually [by default ccp1pps i/p is ra.5]

    Warning I'm not a teacher

  3. #3
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    Default Re: PPS understanding on 16F15313

    Thanks Richard for your reply.

    I'll post the note when I can, but it addresses PPS. It mentions CCP1 through CCP7, TX/RX 1 and 2, and HPWM.

    Poking around in it tonight I'm starting to believe I'm loosing the capture because of DT_INTS. I may actually be using PPS correctly and still be missing it because the INT is messed up. I have tried to make a version of DT_INTs that addresses the differences in the newer registers that Darrell had never seen. I've been working on it tonight, and not having the success that I would like to have. I keep digging deeper into DT_INTS to try and understand it better, but it's slow, and a bit out of my range... for now, at least.

    It looks like its time to effectively update Darrell's work for this new family of processors. If I decipher it to any reasonable degree, it would allow me to continue on this system. I'm not ready to give up on PIC's just yet, and I loath the thought of having to do anything without DT_INTs.
    bo
    Last edited by boroko; - 20th September 2020 at 13:36.

  4. #4
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    Default Re: PPS understanding on 16F15313

    PBP3_PPS_NOTES.txt:

    THIS FILE HAS BEEN UPDATED FOR PBP 3.1.1

    Devices with full Peripheral Pin Select (PPS) may be manipulated with the
    DEFINEs listed below. Default values shown may be subject to change due to
    Microchip pre-defined values. If in doubt, use the DEFINES to override defaults.


    --------------------------------------------------------------------------------

    Default output pins if no DEFINE is used:

    Pins: 8 14/16 20 28/40/48 64
    CCP1 RA2 RC5 RC5 RC2 RC2
    CCP2 RA5 RC3 RC3 RC1 RC1
    CCP3 RA2 RA2 RB5 RC3
    CCP4 RC1 RA4 RB0 RG3

    RX1 RA1 RC5 RB5 RC7 RC7
    TX1 RA0 RC4 RB7 RC6 RC6
    RX2 RC1 RC1 RB5* RG2
    TX2 RC2 RC2 RB4* RG1

    * RX2/TX2 defaults changed for some devices in PBP 3.1.1 to avoid ICSP lockout.

    Note that on some devices, any pin that is assigned to a CCP channel
    may not function as normal I/O. If a pin's CCP default inhibits a
    desired function, you can cancel the default as described below.

    --------------------------------------------------------------------------------
    HPWM

    Use the following PBP DEFINE statements to specify the output pins for HPWM.
    Check the Microchip datasheet (Peripheral Pin Select PPS) for the pins allowed
    on each CCP channel. The PPS peripheral will automatically be configured
    for the specified output pin upon execution of HPWM. When used on devices
    without PPS, these defines will only control the Data Direction SFRs (TRIS).

    These defines set PPS SFRs only once at program initialization. You may
    change the PWM output pin at any point in your program code by modifying
    the PPS SFRs. The HPWM command may be used without these DEFINEs if you
    manually configure the PPS and TRIS SFRs.

    As noted below, you may use DEFINE CCPx_REG 0 to inhibit PPS inititalization
    and automatic TRIS settings for any channel. You should do this if you plan
    to relocate pins with PPS settings at run-time to avoid erroneous TRIS settings.


    DEFINE CCP1_REG PORTC 'Channel-1 port
    DEFINE CCP1_BIT 2 'Channel-1 bit
    DEFINE CCP2_REG PORTC 'Channel-2 port
    DEFINE CCP2_BIT 1 'Channel-2 bit
    DEFINE CCP3_REG PORTC 'Channel-3 port
    DEFINE CCP3_BIT 3 'Channel-3 bit
    DEFINE CCP4_REG PORTG 'Channel-4 port
    DEFINE CCP4_BIT 3 'Channel-4 bit
    DEFINE CCP5_REG PORTG 'Channel-5 port
    DEFINE CCP5_BIT 4 'Channel-5 bit
    DEFINE CCP6_REG PORTE 'Channel-6 port
    DEFINE CCP6_BIT 6 'Channel-6 bit
    DEFINE CCP7_REG PORTE 'Channel-7 port
    DEFINE CCP7_BIT 7 'Channel-7 bit

    DEFAULT CCP PINS SET FOR UNUSED HPWM CHANNELS! If CCP_REG DEFINEs are set
    for unused channels, either explicitly or by default, the ports/pins specified
    as CCP/PWM outputs may not function as normal I/O until the PPS SRFs are cleared
    in your program code. To remove a default setting, define the CCPx_REG as 0,
    for example:

    DEFINE CCP1_REG PORTC 'Channel-1 port
    DEFINE CCP1_BIT 2 'Channel-1 bit
    DEFINE CCP2_REG 0 'Channel-2 UNUSED
    DEFINE CCP2_BIT 0 'Channel-2 bit
    DEFINE CCP3_REG 0 'Channel-3 UNUSED
    DEFINE CCP3_BIT 0 'Channel-3 bit
    DEFINE CCP4_REG 0 'Channel-4 UNUSED
    DEFINE CCP4_BIT 0 'Channel-4 bit


    --------------------------------------------------------------------------------
    HSEROUT/HSEROUT2

    Use the following PBP DEFINE statements to specify the output pins for HSEROUT
    and HSEROUT2. Check the Microchip datasheet (Peripheral Pin Select PPS) for the
    pins allowed on each EUSART. The PPS peripheral will automatically be configured
    for the specified RX/TX pins only once after reset or power up. This allows the
    PPS SFRs to be changed at runtime to relocate the RX/TX pins as needed. These
    defines will have no effect on devices without PPS.

    DEFINE HSER_RXREG PORTC
    DEFINE HSER_RXBIT 7
    DEFINE HSER_TXREG PORTC
    DEFINE HSER_TXBIT 6
    DEFINE HSER2_RXREG PORTB
    DEFINE HSER2_RXBIT 5
    DEFINE HSER2_TXREG PORTB
    DEFINE HSER2_TXBIT 4

  5. #5
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    Default Re: PPS understanding on 16F15313

    looking at PBP3_PPS_NOTES for ccp i see no mention of seting ccp inputs at all, its outputs

    reassigning ccpx inputs will be a manual effort

    the dt_ints-14 will not work in standard form , all the ccp ints are in pie/r 6

    i would just insert a new int to the file

    Code:
      #define CCP1_INT     PIR1,CCP1IF, PIE1,CCP1IE    ;-- CCP1 
      #define CCP2_INT     PIR2,CCP2IF, PIE2,CCP2IE    ;-- CCP2 
      #define CCP3_INT     PIR3,CCP3IF, PIE3,CCP3IE    ;-- CCP3                *
      #define CCP4_INT     PIR3,CCP4IF, PIE3,CCP4IE    ;-- CCP4                *
      #define CCP5_INT     PIR3,CCP5IF, PIE3,CCP5IE    ;-- CCP5                *
      #define CCP1_15313_INT     PIR6,CCP1IF, PIE6,CCP1IE    ;-- CCP1 
    
    Warning I'm not a teacher

  6. #6
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    Default Re: PPS understanding on 16F15313

    Richard,
    Thanks, I'll work on it again tonight and update as I sort it out.

    btw, thanks for taking up the torch around here. It probably seems tiring helping all the time, but it is appreciated.

    bo

  7. #7
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    Default Re: PPS understanding on 16F15313

    Other than adding the define, is there anything else that needs to be addressed in DT_INTs to make it work?

  8. #8
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    Default Re: PPS understanding on 16F15313

    Other than adding the define, is there anything else that needs to be addressed in DT_INTs to make it work?
    other than
    Code:
    asm
    INT_LIST macro
          INT_Handler  CCP1_15313_INT,   _myisr,    PBP,  yes
          
          endm
          INT_CREATE
    
    
    ENDASM
    thats about all i recall . http://dt.picbasic.co.uk/ might have some detail i have missed
    Warning I'm not a teacher

  9. #9
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    Default Re: PPS understanding on 16F15313

    I have been to http://http://dt.picbasic.co.uk/ a number of times to refresh myself, but I admit, I haven't mined it thoroughly. I went back and found a couple of nuggets. One was in "DT's other code examples" that gave a better explanation of IOC interrupts, the other was by mpgmike named http://dt.picbasic.co.uk/INT16/Customisation.

    I had found his explanation on the forums of the PIC18's, but couldn't quite sort it for the lesser PIC's.

    bo

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    Default Re: PPS understanding on 16F15313

    found his explanation on the forums of the PIC18's, but couldn't quite sort it for the lesser PIC's.
    i agree, its not very clear which "mods" apply to which dt-ints version
    a simple example adding 1 extra or modified dt-int to each version would be clearer
    adding a swag of int sources you will never use is an overkill for a pretty simple process

    you could use conditional asm constants to add a more generalised approach and standard notation
    like this
    ifdef PIR6
    #define CCP1_INT PIR6,CCP1IF, PIE6,CCP1IE ;-- CCP1
    #define CCP2_INT PIR6,CCP2IF, PIE6,CCP2IE ;-- CCP2
    else
    #define CCP1_INT PIR1,CCP1IF, PIE1,CCP1IE ;-- CCP1
    #define CCP2_INT PIR2,CCP2IF, PIE2,CCP2IE ;-- CCP2
    endif
    but who can be bothered to see if every pic16 chip with a PIR6 has a ccp1 + 2 and conforms to these settings.
    and what about new chips
    its just not worth the effort these days
    Warning I'm not a teacher

  11. #11
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    Default Re: PPS understanding on 16F15313

    With your suggestions I was able to get it working. I will post the basics in case someone else needs to get through this. Having a better understanding of PPS will help a lot moving forward and allow me to take advantage of a lot of new features, some of which I didn't even know existed like an Angular Timer and a Math Accelerator with Proportional-Integral-Derivative (PID). Very interesting blocks to work with.

    bo

  12. #12
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    Default Re: PPS understanding on 16F15313

    Here's what I finally worked out:

    Code:
    '*** DT_INTS_14.pbp changed and renamed DT_INTS_16F1xxx.pbp (AND put in the right folder!  ****************** 
    '*** bottom 2 lines apply to program below *******
    '...........
    ASM
    asm = 0
    Asm = 0
    ASM = 0
    pbp = 1
    Pbp = 1
    PBP = 1
    yes = 1
    Yes = 1
    YES = 1
    no  = 0
    No  = 0
    NO  = 0
    
    
      #define ALL_INT      	INTCON,GIE, INTCON,GIE      ;-- Global Interrupts   *
      #define T1GATE_INT   	PIR1,TMR1GIF, PIE1,TMR1GIE  ;-- Timer1 Gate         *
      #define INT_INT      	PIR0,INTF,  PIE0,INTE       ;-- External INT
        #define IOCA0_INT   IOCAF,IOCAF0, PIE0,IOCIE   ; RA0 IOC+           (MR)
        #define IOCA1_INT   IOCAF,IOCAF1, PIE0,IOCIE   ; RA1 IOC+           (MR)
        #define IOCA2_INT   IOCAF,IOCAF2, PIE0,IOCIE   ; RA2 IOC+           (MR)
        #define IOCA3_INT   IOCAF,IOCAF3, PIE0,IOCIE   ; RA3 IOC+           (MR)
        #define IOCA4_INT   IOCAF,IOCAF4, PIE0,IOCIE   ; RA4 IOC+           (MR)
        #define IOCA5_INT   IOCAF,IOCAF5, PIE0,IOCIE   ; RA5 IOC+           (MR)    
        #define IOCC0_INT   IOCCF,IOCCF0, PIE0,IOCIE   ; RC0 IOC+           (MR)
        #define IOCC1_INT   IOCCF,IOCCF1, PIE0,IOCIE   ; RC1 IOC+           (MR)
        #define IOCC2_INT   IOCCF,IOCCF2, PIE0,IOCIE   ; RC2 IOC+           (MR)
        #define IOCC3_INT   IOCCF,IOCCF3, PIE0,IOCIE   ; RC3 IOC+           (MR)
        #define IOCC4_INT   IOCCF,IOCCF4, PIE0,IOCIE   ; RC4 IOC+           (MR)
        #define IOCC5_INT   IOCCF,IOCCF5, PIE0,IOCIE   ; RC5 IOC+           (MR)
    
        #define CCP1_15313_INT PIR6,CCP1IF, PIE6, CCP1IE  ;                 (MR) 
        #define CCP2_15313_INT PIR6,CCP2IF, PIE6, CCP2IE  ;                 (MR)  
    '................



    Code:
    '****************************************
    '*  Name    : 16F15313 test-1.BAS                              
    '*  Author  :                                               
    '*  Notice  : Copyright (c) 2020    
    '*             : All Rights Reserved                              
    '*  Date    : 9/19/20                                             
    
    '* CCP1 used for Capture,  16F15313 has two            
    '*THIS REV:  WORKING                                            
    
    '                                    16F15313   
    '                        ---------------u-------------
    '                      -|vdd (+)                vss(-) |-         
    '       VSS out    -|RA5                 RA0/pgd |-  Pulse in *       
    '                      -|RA4                  RA1/pgc |-  Neut Out       
    '                      -|A3/Vpp/MCLR         RA2/ |-       
    '                         ----------------------------    
    '****************************************************************
    include "DT_INTS-16F1xxx.pbp"    ; Base Interrupt System. Ver 1.22 
    INCLUDE "ReEnterPBP.pbp"         ; Include for DT_INTS.  ver 3.4
    '*****************************************************************
    define OSC 8            ' tell the compiler that the OSC is 8MHz
    OSCEN = %01000000       ' HFINTOSC 
    OSCFRQ = %00000011      ' 8MHz
    '*********
    
    CCP1PPS = 0              ' assigns CCP1 Input to RA0;
    '*********
    PulseIN      var PORTA.0  ' 
    LED1        var PORTA.1  '  
    LED2         var PORTA.5  ' 
    PORTA   = %00001001      ' Outputs (except 0&3) = 0 on bootup
    TRISA = %00001001      ' Pins output(except 0&3)                                  
    ANSELA  = %00000000      ' Set all digital 
    ';----[High Priority Interrupts]----------------------------------------
    ASM
    INT_LIST  macro    ; IntSource,   Label,   Type, ResetFlag?
            INT_Handler  CCP1_15313_INT,   _Capture,  PBP, yes ;
        endm                     
            INT_CREATE               ; Creates the High Priority interrupt processor
            INT_ENABLE  CCP1_15313_INT
    ENDASM
    CCP1CON = %10000101    'capture mode, capture on rising edge
    
    Main:
    pause 1000
    GOTO Main
    '---[CCP1 - interrupt handler]------------------------------------------
    Capture:  ' Enter here with PulseIN (CCP1) 
        if CCP1CON = %10000101 then    ' If rising edge capture, then
            toggle LED1
            goto Over_CCP   ' Done, exit  
        endif
     if CCP1CON = %10000100 then   ' If falling edge capture, then
        toggle LED2
        CCP1CON = %10000101    ' switch back to rising edge
     endif
     Over_CCP    
    @ INT_RETURN
    END

  13. #13
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    Default Re: PPS understanding on 16F15313

    not sure your ioc solution will work
    the ioc interrupt flag pir0.4 is not being cleared . you only clear the ioc pin flag, its not enough.
    Warning I'm not a teacher

  14. #14
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    Default Re: PPS understanding on 16F15313

    The IOC may not work. I had those in DT_INTS when I was trying to use that instead of CCP. I will have to go back and address that.

  15. #15
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    Default Re: PPS understanding on 16F15313

    For reference, I found a missed line when I copied this to here:

    Code:
    '---[CCP1 - interrupt handler]------------------------------------------
    Capture:  ' Enter here with PulseIN (CCP1) 
        if CCP1CON = %10000101 then    ' If rising edge capture, then
            toggle LED1
            CCP1CON = %10000100    ' switch to falling edge 
            goto Over_CCP   ' Done, exit  
        endif
     if CCP1CON = %10000100 then   ' If falling edge capture, then
        toggle LED2
        CCP1CON = %10000101    ' switch back to rising edge
     endif
     Over_CCP    
    @ INT_RETURN

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