PPS understanding on 16F15313

[boroko]

Hi All,

I've been struggling to understand Peripheral Pin Select (PPS). Tried once on a 16F18624 and gave up. Trying to understand it again, as it seems like all the current chips are going that way and it would be a wonderful feature to master. Currently I could use it on a 16F15313 and I'm unsure if I'm doing it right.

I have found the PBP3_PPS_notes.txt file, looked at the TB3130 Tech Brief, and looked for clarification in the datasheet, but I'm not seeing evidence that I'm implementing it correctly. Specifically I need one of the CCP modules for capturing a pulse on PORTA.0, and the other CCP to generate PWM on PORTA.2.

Side note: my program is using DT_INTs, but I don't see why that would change things. I'm creating the INT_Handler for CCP1 after the defines.

.....
DEFINE CCP1_REG PORTA      ' capture pulse on RA.0 (pin 7)
DEFINE CCP1_BIT 0
DEFINE CCP2_REG PORTA      ' generate HPWM on RA.2 (pin5)
DEFINE CCP2_BIT 2
.....

If I understand it correctly, that should do it. So far I'm only trying to capture the pulse on RA.0, but not having success.
I'll continue to try and devise a method to test this, but if someone has any clarifications, it sure would help.

Thanks
bo

[richard]

bo
i'm not a 3.1 user but from all i have seen those defines only refer to the hpwm command

i don't have access to the PBP3_PPS_notes.txt notes file either, so does it reference to ccp capture mode at all ?

i would set porta.0 to digital and input mode and ccp1pps to use ra.0 manually [by default ccp1pps i/p is ra.5]

[boroko]

Thanks Richard for your reply.

I'll post the note when I can, but it addresses PPS. It mentions CCP1 through CCP7, TX/RX 1 and 2, and HPWM.

Poking around in it tonight I'm starting to believe I'm loosing the capture because of DT_INTS. I may actually be using PPS correctly and still be missing it because the INT is messed up. I have tried to make a version of DT_INTs that addresses the differences in the newer registers that Darrell had never seen. I've been working on it tonight, and not having the success that I would like to have. I keep digging deeper into DT_INTS to try and understand it better, but it's slow, and a bit out of my range... for now, at least.

It looks like its time to effectively update Darrell's work for this new family of processors. If I decipher it to any reasonable degree, it would allow me to continue on this system. I'm not ready to give up on PIC's just yet, and I loath the thought of having to do anything without DT_INTs.
bo

[boroko]

PBP3_PPS_NOTES.txt:

THIS FILE HAS BEEN UPDATED FOR PBP 3.1.1

Devices with full Peripheral Pin Select (PPS) may be manipulated with the
DEFINEs listed below. Default values shown may be subject to change due to
Microchip pre-defined values. If in doubt, use the DEFINES to override defaults.


--------------------------------------------------------------------------------

Default output pins if no DEFINE is used:

Pins: 8 14/16 20 28/40/48 64
CCP1 RA2 RC5 RC5 RC2 RC2
CCP2 RA5 RC3 RC3 RC1 RC1
CCP3 RA2 RA2 RB5 RC3
CCP4 RC1 RA4 RB0 RG3

RX1 RA1 RC5 RB5 RC7 RC7
TX1 RA0 RC4 RB7 RC6 RC6
RX2 RC1 RC1 RB5* RG2
TX2 RC2 RC2 RB4* RG1

* RX2/TX2 defaults changed for some devices in PBP 3.1.1 to avoid ICSP lockout.

Note that on some devices, any pin that is assigned to a CCP channel
may not function as normal I/O. If a pin's CCP default inhibits a
desired function, you can cancel the default as described below.

--------------------------------------------------------------------------------
HPWM

Use the following PBP DEFINE statements to specify the output pins for HPWM.
Check the Microchip datasheet (Peripheral Pin Select PPS) for the pins allowed
on each CCP channel. The PPS peripheral will automatically be configured
for the specified output pin upon execution of HPWM. When used on devices
without PPS, these defines will only control the Data Direction SFRs (TRIS).

These defines set PPS SFRs only once at program initialization. You may
change the PWM output pin at any point in your program code by modifying
the PPS SFRs. The HPWM command may be used without these DEFINEs if you
manually configure the PPS and TRIS SFRs.

As noted below, you may use DEFINE CCPx_REG 0 to inhibit PPS inititalization
and automatic TRIS settings for any channel. You should do this if you plan
to relocate pins with PPS settings at run-time to avoid erroneous TRIS settings.


DEFINE CCP1_REG PORTC 'Channel-1 port
DEFINE CCP1_BIT 2 'Channel-1 bit
DEFINE CCP2_REG PORTC 'Channel-2 port
DEFINE CCP2_BIT 1 'Channel-2 bit
DEFINE CCP3_REG PORTC 'Channel-3 port
DEFINE CCP3_BIT 3 'Channel-3 bit
DEFINE CCP4_REG PORTG 'Channel-4 port
DEFINE CCP4_BIT 3 'Channel-4 bit
DEFINE CCP5_REG PORTG 'Channel-5 port
DEFINE CCP5_BIT 4 'Channel-5 bit
DEFINE CCP6_REG PORTE 'Channel-6 port
DEFINE CCP6_BIT 6 'Channel-6 bit
DEFINE CCP7_REG PORTE 'Channel-7 port
DEFINE CCP7_BIT 7 'Channel-7 bit

DEFAULT CCP PINS SET FOR UNUSED HPWM CHANNELS! If CCP_REG DEFINEs are set
for unused channels, either explicitly or by default, the ports/pins specified
as CCP/PWM outputs may not function as normal I/O until the PPS SRFs are cleared
in your program code. To remove a default setting, define the CCPx_REG as 0,
for example:

DEFINE CCP1_REG PORTC 'Channel-1 port
DEFINE CCP1_BIT 2 'Channel-1 bit
DEFINE CCP2_REG 0 'Channel-2 UNUSED
DEFINE CCP2_BIT 0 'Channel-2 bit
DEFINE CCP3_REG 0 'Channel-3 UNUSED
DEFINE CCP3_BIT 0 'Channel-3 bit
DEFINE CCP4_REG 0 'Channel-4 UNUSED
DEFINE CCP4_BIT 0 'Channel-4 bit


--------------------------------------------------------------------------------
HSEROUT/HSEROUT2

Use the following PBP DEFINE statements to specify the output pins for HSEROUT
and HSEROUT2. Check the Microchip datasheet (Peripheral Pin Select PPS) for the
pins allowed on each EUSART. The PPS peripheral will automatically be configured
for the specified RX/TX pins only once after reset or power up. This allows the
PPS SFRs to be changed at runtime to relocate the RX/TX pins as needed. These
defines will have no effect on devices without PPS.

DEFINE HSER_RXREG PORTC
DEFINE HSER_RXBIT 7
DEFINE HSER_TXREG PORTC
DEFINE HSER_TXBIT 6
DEFINE HSER2_RXREG PORTB
DEFINE HSER2_RXBIT 5
DEFINE HSER2_TXREG PORTB
DEFINE HSER2_TXBIT 4

[richard]

looking at PBP3_PPS_NOTES for ccp i see no mention of seting ccp inputs at all, its outputs

reassigning ccpx inputs will be a manual effort

the dt_ints-14 will not work in standard form , all the ccp ints are in pie/r 6

i would just insert a new int to the file

  #define CCP1_INT     PIR1,CCP1IF, PIE1,CCP1IE    ;-- CCP1 
  #define CCP2_INT     PIR2,CCP2IF, PIE2,CCP2IE    ;-- CCP2 
  #define CCP3_INT     PIR3,CCP3IF, PIE3,CCP3IE    ;-- CCP3                *
  #define CCP4_INT     PIR3,CCP4IF, PIE3,CCP4IE    ;-- CCP4                *
  #define CCP5_INT     PIR3,CCP5IF, PIE3,CCP5IE    ;-- CCP5                *
  #define CCP1_15313_INT     PIR6,CCP1IF, PIE6,CCP1IE    ;-- CCP1 

[boroko]

Richard,
Thanks, I'll work on it again tonight and update as I sort it out.

btw, thanks for taking up the torch around here. It probably seems tiring helping all the time, but it is appreciated.

bo