Customizing the DT_INTS-XX.bas Instant Interrupt


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    Default Customizing the DT_INTS-XX.bas Instant Interrupt

    Since Daryl Taylor created his Instant Interrupt Routine, Microchip has added many new features and changed PIR locations for their new MCUs. We recently visited the K40 application on the Forum, and I just revamped a special copy of the DT_INTS-18 for the 18F24_7K42 processors. I wanted to share the process so others could customize a version for whatever processor needed for their next project.

    On page 167 of the 18F27K42 Data Sheet is a Registery Summary for the Interrupt Registers (Table 9-3). Every Data Sheet has such a list. It lists INTCON as well as all of the PIR/PIE Registers. For the K42, there are 10 PIE/PIR Registers (PIR0, PIR1...PIR10). After each register is the Flag name for each Bit. For example, for PIR0 you have IOCIF, CRCIF, SCANIF, NVMIF, CSWIF, OSFIF, HLVDIF, SWIF. Some of these names are familiar, like IOCIF for the Interrupt on Port Change. CRCIF is a relatively new Function called Cyclic Redundancy Check. NVMIF is a new name for an old Interrupt. Old = EEIF for the EEPROM Write Complete Function. Now it's called Non-Volatile Memory Write Complete, or NVMIF. You don't need to know what each of the xxIF's do to create a custom DT_INTS, you just need the Interrupt Registery Summary. For the more familiar PIC18F2x_4xK22, the Interrupt Registery Summary is Table 9-1 on Page 133.

    Next, open a copy of the applicable DT_INTS-18.bas in your Microcode Studio (PBP). Assuming you have opened the last original Daryl Taylor version (not one that has already been customized by one of us Forum members), starting on Line 59 the Interrupts are Defined. On Line 59 we see:

    #define INT_INT INTCON, INTIF ;-- INT External, 16F compatible

    Every Line of the Defines begin with #define. Next is the Interrupt, INT_INT in the above example. This denotes Hardware Interrupt on PORTB.0 INT pin. For the older processors, the INTIF is in the INTCON Register. It is called INTIF in the Interrupt Registery Summary. After that are comments suggesting what that Interrupt does.

    If we leave Line 59 alone and erase from Line 60 to Line 183, we've cleared out all of the #defines for stuff we don't need, and could create conflicts. We'll leave one lone example, which we can copy/paste and modify. Taking the PIR0 listed above, we would make our own #defines like this:

    #define IOC_INT PIR0, IOCIF ;-- Interrupt on Change
    #define CRC_INT PIR0, CRCIF ;-- Cyclic Redundancy Check
    #define SCAN_INT PIR0, SCANIF ;-- For the Scan Function
    #define NMV_INT PIR0, NMVIF ;-- Non-Volatile Memory (EEPROM Write)
    #define CSW_INT PIR0, CSWIF ;-- Clock Switch
    #define OSF_INT PIR0, OSFIF ;-- Oscillator Fail
    #define HVLD_INT PIR0, HVLDIF ;-- High/Low Voltage Detect
    #define SW_INT PIR0, SWIF ;-- ?

    Now we can continue with PIR1:

    #define SMT1PWA_INT PIR1, SMT1PWAIF ;-- .....

    And so forth. Save as something unique (like DT_INTS-18_K42.bas) and you're done. The 'Save As' will prevent this custom version from accidentally getting used for the wrong processor.
    Last edited by mpgmike; - 24th November 2017 at 07:58.

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