EUSART's - Which timers do they use?

[Christopher4187]

Referencing page 12 of the 18F87J50 data sheet, the diagram has arrows pointing from EUSART1 to Timer3 and EUSART2 to Timer4. Is that true? If not, which timers are they associated with?

For now, I need to use a pause in a timer. I know you're not supposed to do that and will remove it when the code gets refined later on. The main reason for asking the question is that when there's a long pause in Timer3 and/or Timer4, the data for HSERIN and HSERIN2 sometimes aren't received.

If I use a pause in any timer, will the HSERIN data always be affected?

[richard]

Referencing page 12 of the 18F87J50 data sheet, the diagram has arrows pointing from EUSART1 to Timer3 and EUSART2 to Timer4. Is that true? If not, which timers are they associated with?

no , the arrows show how the modules connect to the internal data bus . not each other

If I use a pause in any timer, will the HSERIN data always be affected?

yes. if the pause is long enough to stop the rx fifo buffer from being read before incoming data causes an overflow of the rx buffer