porta problems during shiftout/shiftin


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  1. #1
    Join Date
    Jul 2013
    Location
    italy
    Posts
    2

    Default porta problems during shiftout/shiftin

    Hello to all, this is the first post of my life so please excuse for any mistake i'll do.
    Is 1 month that i am trying to find a solotion to this: In my project when i useshifin or shift out commands the pin ra.4 (that is not involved) goes low!
    And remain low. i can't figure why..why.....why!!!! i am going mad!
    Changing the clock pin from porta.1 to portb.x does the job: the porta.4 remain high as i want. This is my spi setup:
    'SPI setup
    cs var porta.2
    sck var porta.1 ;this is the matter
    si var portE.0
    so var porta.3
    output porta.2
    output porta.1
    output porta.3
    input portE.0

    the processor is a 18LF4550 (low voltage option version)
    i attach a part of my code:
    SPI.txt
    i have trying everything, maybe someone will solve this matter....

    Thankyou in advance .
    Guido
    Last edited by eccessivo; - 19th July 2013 at 08:06. Reason: information integration

  2. #2
    Join Date
    Jan 2005
    Location
    Montreal, Quebec, Canada
    Posts
    2,597

    Default Re: porta problems during shiftout/shiftin

    Port A often has analog features. Have you tried making it digital?

    (Can't view your code of this phone)

    Robert

  3. #3
    Join Date
    Jul 2013
    Location
    italy
    Posts
    2

    Default Re: porta problems during shiftout/shiftin

    Hi Demon and thankyou for the fast reply. Yes , with this line
    ADCON1=%00001110
    i set porta.0 to analog and all the others pins on porta to digital

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