Pbp3.1.1

[richard]

using labels

isr

T1ISR:
ASM                                  ;ISR code  relocateable
    BANKSEL PIR4                        ;BANKSELECT for PIR4
    BCF PIR4,0                          ;Clear TMR1IF
;    BANKSEL LATC                        ;BANKSELECT for LATC
;    BTG _LED                            ;Bit Toggle LATC.3 (LED)
    MOVLW 086h
    BANKSEL TMR1H                       ;BANKSELECT for TMR1
    MOVWF TMR1H, 1
;    TMR1H = $86
    MOVLW 0E7h                          ;34535d = 1 Second Interrupts
    MOVWF TMR1L, 1
;    TMR1L = $E7
    BANKSEL T1CON                       ;BANKSELECT for T1CON
    MOVLW 1                             ;T1CON = %00000001
    MOVWF T1CON, 1
;    T1CON = %00000001
    MOVLB 0
    BSF Cycle
    INFSNZ DispL
    INCF DispH
    RETFIE FAST                         ;RETURN & Restore
ENDASM

in init

  
    MOVLW       low (_T1ISR >> 2) ; 08C0h >> 2 = 0230h
    MOVWF       TABLAT, ACCESS
    TBLWT*+
    MOVLW       high (_T1ISR >> 2)
    MOVWF       TABLAT, ACCESS
    TBLWT*+

caveat what is the label size for pbp3.1 ? might limit location to first 64k block

[tumbleweed]

The format deviates from the Data Sheet in that Address locations are denoted with "ORG 0x08C0" instead of "T1ISR CODE 0x08C0". I still don't understand why it has to use Non-Volitile Memory (NVM) for creating the Vector Addresses, but it works

The difference between ORG and CODE is that you use ORG when working with the assembler in absolute mode, and CODE when using the assembler in relocatable mode (ie using a linker). PBP works in absolute mode, so use ORG.

The NVM instructions are to set the table of vectors (IVT) into the program flash memory. The IVTBASE registers set where the table starts in memory but you still have to put the address of each interrupt handler into the IVT table.

[mpgmike]

Thanks Tumbleweed. As to the other questions & comments, I don't know where to find those answers; "what is the label size for PBP3.1?"

Richard, you seem to indicate you are using PBP 3.0 (?). I let the linker set the PBP start address. I didn't open the List file to find out. Since I'm just copying from Data Sheets, it would be nice if someone with PBP 3.1 could test some of the mentioned short cuts to see if they work. If they do, I'll try to figure out what was actually done and learn from it.

[richard]

I wonder if there is any gain using vectored interrupts , for all the extra effort and the risk in locating the vector table inappropriately {like slap bang in the middle of your pgm space}. I cant see that it will perform significantly better than a normal preemptive isr routine for multiple interrupt sources .
I asked about the pbp reset org thinking it would be nice to locate the ivt at that point and then use "define RESET ORG" to skip over it .
you could then load your vectors at compile time with @ dw ...... . heaps easier to manage . still need to Vector Table Start Address regs though.
I have some chips on order with element14 but the have none in stock , when the arrive I will try with xc8 to see if its worth the effort.
I wonder why they [microchip] did not just allocate more vector address permanently like an avr chip
"what is the label size for PBP3.1?" since there are 128k chips in this family I guess they have to at least big enough , still test it first

[tumbleweed]

You raise some good points about how/where everything is located.

I think the gains in using vectored interrupts would depend a lot on how many interrupts your program uses.
If you use a lot of interrupts then having individual vectors can speed it up quite a bit since you don't have to test the IE and IF flags for each interrupt.
If you only use one or two then the gain might not be that much, if any.

I suppose you could have different vectors storing different context data so there's that to consider. You might have to do a lot of that by hand, though.

Either way you get the fast hardware context saving for both low and high priorities, so that's a boost (assuming you change DT-INTS to remove that duplicate code).

[mpgmike]

I've used 7 or 8 interrupts in a single program in the past. I agree that for 1 or 2, it makes more sense to just use the conventional High/Low Priority Interrupts, which the K42 can do as well. Even with High/Low Priority, default addresses are 000008h for High and 000018 for Low. These can be changed with IVTBASE the same as the Vectored Ints. Since it's something new, I had to try to figure it out. The Data Sheet showed how to load the Vector Table Start Address at 004008h. I tried loading it at 0008, but didn't understand what was being done well enough to get it to work. Using the example 4008h, it worked.