Thanks for the additional input TABSoft, I had already changed the $0D register to $08, and still saw no interrupt.
One thing I had noticed, In the Send_Packet routine, I saw you re-write the registers. I had changed your original code changing registers $1F, $0D, $0E, in which you re-wrote the registers to the original value, I changed to read the register 1st, then performed the logic manipulation thinking it may have been an oversight on your part. Still no output:
Code:
Send_Packet:    
            'Set Standby mode
            bRF_Mode = RF_STANDBY
            gosub SetRFMode
    
            'Enable FIFO access in Standby mode
            bReg_Address = $1F  'Register 31
            gosub RegisterRead
            bReg_Value = ((bReg_Value & $BF) | $00)
'            bReg_Value = (RF_Init_Values(bReg_Address) & $BF) | $00
            gosub RegisterSet
            'Clear FIFO Overrun
            bReg_Address = $0D  'Register 13
            gosub RegisterRead
            bReg_Value = bReg_Value | $01
'            bReg_Value = (RF_Init_Values(bReg_Address) | $01)
            gosub RegisterSet
            'Set PLL Locked
            bReg_Address = $0E  'Register 14
            gosub RegisterRead
            bReg_Value = bReg_Value | $02                                       'Set LSTLPLL to 1
'            bReg_Value = (RF_Init_Values(bReg_Address) | $02)
            gosub RegisterSet
'debug "Send Packet: waiting for PLL lock",13
'            gosub PLLchk  'Verify PLL Lock Flag
'debug "Send Packet: PLL locked",13
    
            For i = 0 to (TxPacketLen-1)
            'Wite the Packets to the FIFO
            wr_FIFO_Val = TxPacket[i]
            gosub WriteFIFO
            Next i 
   
            'Set RFMode to Transmit
            bRF_Mode = RF_TRANSMITTER
            gosub SetRFMode
            return
Then as you can also see, I also added a bit test to see if in fact the PLL locked - it never did. Just sat there and spun waiting. I don't know what that is telling me. The 2 other places I have the wait until PLL lock do seem to change; the initial initialization and the RCV loop. Don't know what that is telling me either......

I like your advice, and I had thought of doing something similar but my observations in the no IRQ0 or IRQ1 being set, I was looking for a way to test the register to see if the FIFO was ready. Some kind of flag I could use.
I still haven't found it - an easy one.

I have been on MC site and found numerous people grumbling over this radio - I can't believe this is so hard! One guy could never get the packet to work and went for the buffered approach. Many, Many posters have had interrupt issues as well. Seems I am not alone. All the more reason to post actual working code.

My current drain is higher on the transmitter, so I think it is transmitting, and I actually believe the receiver is receiving - I just don't have it set to flag me so I can get the data!

Thanks again for the assist, I owe you several beers! Any other ideas?
Regards.