SSD1306 INCLUDE for PBP3


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  1. #1
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    Default Re: SSD1306 INCLUDE for PBP3

    Just tested the new include you post and works with soft I2C as expected. But not on hardware I2C...

    My code with new include:

    Code:
    #CONFIG
        CONFIG  PLLDIV = 1            ; Divide by 5 (20 MHz oscillator input)
        CONFIG  CPUDIV = OSC1_PLL2    ; [Primary Oscillator Src: /1][96 MHz PLL Src: /2]
        CONFIG  USBDIV = 2            ; USB clock source comes from the 96 MHz PLL divided by 2
        CONFIG  FOSC = ECPLLIO_EC     ; HSPLL_HS       ; HS oscillator, PLL enabled (HSPLL)
        CONFIG  FCMEN = OFF           ; Fail-Safe Clock Monitor disabled
        CONFIG  IESO = OFF            ; Oscillator Switchover mode disabled
        CONFIG  PWRT = OFF            ; PWRT disabled
        CONFIG  BOR = ON              ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
        CONFIG  BORV = 3              ; Minimum setting
        CONFIG  VREGEN = ON           ; USB voltage regulator enabled
        CONFIG  WDT = ON              ; WDT enabled
        CONFIG  WDTPS = 512           ; 1:512
        CONFIG  CCP2MX = ON           ; CCP2 input/output is multiplexed with RC1
        CONFIG  PBADEN = OFF          ; PORTB<4:0> pins are configured as digital I/O on Reset
        CONFIG  LPT1OSC = OFF         ; Timer1 configured for higher power operation
        CONFIG  MCLRE = ON            ; MCLR pin enabled; RE3 input pin disabled
        CONFIG  STVREN = ON           ; Stack full/underflow will cause Reset
        CONFIG  LVP = OFF             ; Single-Supply ICSP disabled
        CONFIG  ICPRT = OFF           ; ICPORT disabled
        CONFIG  XINST = OFF           ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
        CONFIG  DEBUG = OFF           ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
        CONFIG  CP0 = OFF             ; Block 0 (000800-001FFFh) is not code-protected
        CONFIG  CP1 = OFF             ; Block 1 (002000-003FFFh) is not code-protected
        CONFIG  CP2 = OFF             ; Block 2 (004000-005FFFh) is not code-protected
        CONFIG  CP3 = OFF             ; Block 3 (006000-007FFFh) is not code-protected
        CONFIG  CPB = OFF             ; Boot block (000000-0007FFh) is not code-protected
        CONFIG  CPD = OFF             ; Data EEPROM is not code-protected
        CONFIG  WRT0 = OFF            ; Block 0 (000800-001FFFh) is not write-protected
        CONFIG  WRT1 = OFF            ; Block 1 (002000-003FFFh) is not write-protected
        CONFIG  WRT2 = OFF            ; Block 2 (004000-005FFFh) is not write-protected
        CONFIG  WRT3 = OFF            ; Block 3 (006000-007FFFh) is not write-protected
        CONFIG  WRTC = OFF            ; Configuration registers (300000-3000FFh) are not write-protected
        CONFIG  WRTB = OFF            ; Boot block (000000-0007FFh) is not write-protected
        CONFIG  WRTD = OFF            ; Data EEPROM is not write-protected
        CONFIG  EBTR0 = OFF           ; Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks
        CONFIG  EBTR1 = OFF           ; Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks
        CONFIG  EBTR2 = OFF           ; Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks
        CONFIG  EBTR3 = OFF           ; Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks
        CONFIG  EBTRB = OFF           ; Boot block (000000-0007FFh) is not protected from table reads executed in other blocks
    #ENDCONFIG
    
    
    DEFINE OSC 48          
        
    LATA = %00000000
    LATB = %00000000
    LATC = %00000000 
    LATD = %00000000
    LATE = %00000000
    
    TRISA = %00100001
    TRISB = %00010000
    TRISC = %00000000
    TRISD = %00000000
    TRISE = %00000000
    
    ;*********************************************************************
    ;           ADC Settings
    ;*********************************************************************
    ADCON0=%00000001
    ADCON1=%00001110
    ADCON2=%10100111
    cmcon=0
    
    ;*********************************************************************
    
     ' Set LCD Data port
    DEFINE LCD_DREG PORTD
    ' Set starting Data bit (0 or 4) if 4-bit bus
    DEFINE LCD_DBIT 4
    ' Set LCD Register Select port
    DEFINE LCD_RSREG PORTD
    ' Set LCD Register Select bit
    DEFINE LCD_RSBIT 0
    ' Set LCD Enable port
    DEFINE LCD_EREG PORTD
    ' Set LCD Enable bit
    DEFINE LCD_EBIT 1
    ' Set LCD bus size (4 or 8 bits)
    DEFINE LCD_BITS 4
    ' Set number of lines on LCD
    DEFINE LCD_LINES 2
    ' Set command delay time in us
    'DEFINE LCD_COMMANDUS 1500
    ' Set data delay time in us
    'DEFINE LCD_DATAUS 50
    
    DEFINE ADC_BITS 10 ' Set number of bits in result
    DEFINE ADC_SAMPLEUS 50 ' Set sampling time in uS
    DEFINE ADC_CLOCK 3
    
    pause 100
    t1con=0
    
    char var byte
    x    var byte  
    y    var byte    
    BUFF VAR BYTE[16]
    
    ;use this define for hw i2c 
    #define hwi2c 1 
    
    ;set and uncomment these to use softi2c
    SCL var Portb.1      ' I2C Clock
    SDA var Portb.0      ' I2C Data
    
    ;set these  to match display
    ssdheight con 7      ; 7 = 8 PAGES  64*128 ,  3 = 4 pages 32*128
    ssdwidth  con 127    ; 128 PIXELS WIDE
    sdd1306_addr con $78
    Include "ssd1306_I2C_16_18.INC"  ' bring it in
    include "font7x5_18.bas"
    '==========================    MAIN  Routine    ==============================
    
    
    gosub glcd_init
    BIG_TEXT = 0
    
    
    looper:
        GLCD_CLR
        GLCDDHL 0,0,75,1       ;x,y,len,patten
        GLCDDHL 0,2,75,128
        GLCDDVL 0,0,3           ;x,y,height [in pages]
        GLCDDVL 75,0,3
        GLCDSTR  5,1,"--SSD1306--"   ;x,y, cont string
        ARRAYWRITE BUFF,["JBCDEF",0]
        CHAR="!"
        GLCDC 100,2,CHAR             ;x,y , chr
        BIG_TEXT = 1
        if ssdheight > 3  then
            GLCDSTR  2,4,BUFF
            ARRAYWRITE BUFF,["@12456-=#",0]
            BIG_TEXT = 0
            GLCDSTR  2,7,BUFF          ;x,y ,str buffer [null terminated]
        else
            pause 1000
            GLCD_CLR
            GLCDSTR  2,0,BUFF
            ARRAYWRITE BUFF,["@12456-=#",0]
            BIG_TEXT = 0
            GLCDSTR  2,3,BUFF
        endif
        PAUSE 3000
    GOTO looper
    Ioannis
    Last edited by Ioannis; - 25th December 2021 at 21:10.

  2. #2
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    Default Re: SSD1306 INCLUDE for PBP3

    it works for me with
    TRISB = % 00010011

    most pic modules that switch pin directions like to control tris themselves, the data sheet for this chip is totally not clear
    at all re i2c tris requirements
    Warning I'm not a teacher

  3. #3
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    Default Re: SSD1306 INCLUDE for PBP3

    Yes, you are right. I took it for granted that this was taken care in the include file. Now it works OK with hard I2C also.

    Next, how to import the 16x16 characters into the 5x7 library.

    Can these co-exist?

    I tried to add your pawn example after the 5x7 data but obviously this does not work if one wants to print character 128...

    I attach my failed try.

    Ioannis
    Attached Files Attached Files

  4. #4
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    Default Re: SSD1306 INCLUDE for PBP3

    I took it for granted that this was taken care in the include file
    it is to some extent , the correct tris setting for sda and scl is the power on default of input for both hw and software i2c
    if the user decides to overwrite those settings its extremely difficult to rectify in an include file since the pins can be virtually
    anywhere on any port depending on chip used

    Next, how to import the 16x16 characters into the 5x7 library.
    you cannot , the font is 5x7 hard coded

    Can these co-exist?
    not as a font
    I tried to add your pawn example after the 5x7 data but obviously this does not work if one wants to print character 128...
    i see no impediment to 5x7 chrs being added to the font to a byte sized quantity, the upper font boundary is not enforced
    mixed font heights is not implemented
    I attach my failed try.
    if you want 16x16 fonts see here, its a completely different strategy
    http://www.picbasic.co.uk/forum/showthread.php?t=24218
    if you want to persist with this code, the chess pieces will need to be bitmaps
    bitmaps in an array would be fairly straight forward, two for each piece type , one as solid the other an outline, with a blank w and blk too
    the board could also be a bit map a piece could then be or-ed or exor-ed into a square depending piece colour and square colour
    Warning I'm not a teacher

  5. #5
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    Default Re: SSD1306 INCLUDE for PBP3

    looks like a 4550 just hasn't the resources for graphics work

    here is a look a my 16x16 pawn font on a 26k22
    Name:  pawns.jpg
Views: 1008
Size:  324.8 KB

    its still a bit clunky @ 16x16

    bmp 48x51
    Name:  bmpp.jpg
Views: 912
Size:  477.6 KB
    Last edited by richard; - 27th December 2021 at 05:07.
    Warning I'm not a teacher

  6. #6
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    Default Re: SSD1306 INCLUDE for PBP3

    The thing is getting more and more complicated...

    I am considering to switch over to a 3,5" Nextion display. Much easier, preloaded images. Even a 12F could handle that! Still I have to use the USB port, so 4550 is the least to use.

    The last try of 48x51 looks great! I do not care about white or black pieces or even the board. White pieces is just fine. But if the resources needed are too much, I don't know if it is worth to keep on trying...

    Thanks a lot for the efforts,
    Ioannis

  7. #7
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    Default Re: SSD1306 INCLUDE for PBP3

    Bitmaps take very modest resources, that one just 48 x 8 bytes of flash
    Warning I'm not a teacher

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