HSERIN HSEROUT 9BIT & PARITY (Output is Losing a bit!)

[retepsnikrep]

I've got some 48000 bps 9,E,1 Data coming into a 12F1822 pic running at 32mhz.

#config
 __config _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _FCMEN_OFF
 __config _CONFIG2, _PLLEN_OFF & _LVP_OFF
#ENDCONFIG 

DEFINE HSER_BAUD 48000	'Set Baud rate to 48000bps
DEFINE HSER_BITS 9		'Set to 9 bit mode
DEFINE HSER_EVEN 1		'Set Even Parity
DEFINE HSER_CLROERR 1   'Clear overflow error automatically  

Start:						'Main program start 

   hserin [wait($83), str IpuData\15]		'Rxd Data
   hserout [$83, str IpuData\15]			'Txd Data
   	
goto start

My code basically waits for the start of a 16 byte packet and receives it then spits it back out again.

I have been watching the data in/out with my Saleae Logic and the output seems to be one bit short!!



I have two serial analyzers running with the same settings. 48000 bps, 9,E,1

The top line/channel is the incoming data which decodes correctly.
The second line is the outgoing data but is does not decode correctly and each byte seems to be one bit short!

If I change the settings of the Saleae output analyser to 8 bit with parity then the data is correct.
So the pic is receiving it correctly but the hserout is wrong for some reason.
Where is my missing bit?

The device that receives this data ultimately is refusing it because it is not the correct length..
Why this discrepancy? What am I missing?

Serin2 also exhibits the same behavior?

I had to resort to Microsoft edge to post this as Chrome still gives too many redirects errors.