16f628 Usart

[fowardbias]

How is the 9th bit address mode setup? The loading of the slave address is the unclear area. Is it loaded into the EEPROM and the 9th bit is an interrupt so the program code can run a compare (LOOKUP) and if they match then accept data.? OR, if the comparision is done within the firmware of the USART how is address data loaded in? I understand the RCREG can be written to and perhaps this is where the address data goes. Another question about the USART running the routine: Is the address data held in a special flash/EEPROM section within the USART module or must it be written to each power up? The data sheet is not specific about this and the MicroChip site is down for now.

[fowardbias]

for those interested in the 9th bit ID setup.when set the PIC uses this data as an address for the software comparison.Several flags are set and cleared during this process which can be used in the program....hm let see, now Where did I put those other PICs

[Dave]

fowardbias, The 9th bit for transmission must be loaded separatly via the TXSTA.0 bit before the register is loaded with the lower 8 bits. Conversly the receiver will place the 9th bit into register RCSTA.0 for you to interpret. This bit can be used by you as a parity bit or as a data bit.

Dave Purola,
N8NTA

[fowardbias]

Thanks Dave, Most of this is falling in place. Looks like the FERR bit when set by a missing stop bit doesn't set an interrupt directly and must be polled for? This type of error may not be a problem if the baudrate is correct.