That bit of the datasheet is a bit confusing. It says:
Data is latched into the shift register on a rising edge of CLKsr while PLsr is held high.
What it doesn't say is if the PLsr can be held high during the while shifting in the rest of the bits or if it is to be held high ONLY on the first rising edge of the CLKsr.
So it sounds to me that you should set PLsr HIGH and then shift in the data. Are you saying that this doesn't work?
What mode of SHIFTIN are you using? By the looks of it you should use mode 3 the docs on the SHIFIN command says, for mode 3:
Shift data in lowest bit first,
Read data after sending clock. Clock idles low.
So,
Code:
HIGH PLsr
SHIFTIN CNTdata, CLKsr, 3, [Count\16]
LowPLsr
If that doesn't work try changin the mode from 3 to 1 and see what happends. If that doesn't work either you will probably have to 'manually' shift in the bits with PLsr held high during the first bit only. Shouldn't to hard to figure out.
HTH
/Henrik Olsson.
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