SHIFTIN problem


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Thread: SHIFTIN problem

  1. #1
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    Default SHIFTIN problem

    hi all. More rookie problems to deal with. I am using the SHIFTIN command to shift in 16 bits of data from a counter. My problem is with initiating the counter's shift register. The following link will lead you to the data sheet for the decoder/counter that I am using.

    http://www.genapta.com/WORD%20DOCS/GEN-2122-5.pdf

    On the 5th page under "Shift Register" you will read that in order to latch the data to the shift register I have to hold PLsr high for one rising edge of the shift register Clock, CLKsr. My problem with that is the SHIFTIN command is what generates the pulses for CLKsr, and I am forced to manually drive CLKsr high while PLsr is high in order to latch the data. As a result, I always miss the first bit. Not good. I need a way to latch the data as the SHIFTIN command begins. Does anyone know a trick I could use to do this? Thanks.
    Last edited by champion; - 26th January 2007 at 19:25. Reason: Forgot the link

  2. #2
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    That bit of the datasheet is a bit confusing. It says:
    Data is latched into the shift register on a rising edge of CLKsr while PLsr is held high.
    What it doesn't say is if the PLsr can be held high during the while shifting in the rest of the bits or if it is to be held high ONLY on the first rising edge of the CLKsr.

    So it sounds to me that you should set PLsr HIGH and then shift in the data. Are you saying that this doesn't work?

    What mode of SHIFTIN are you using? By the looks of it you should use mode 3 the docs on the SHIFIN command says, for mode 3:
    Shift data in lowest bit first,
    Read data after sending clock. Clock idles low.
    So,
    Code:
    HIGH PLsr
    SHIFTIN CNTdata, CLKsr, 3, [Count\16]
    LowPLsr
    If that doesn't work try changin the mode from 3 to 1 and see what happends. If that doesn't work either you will probably have to 'manually' shift in the bits with PLsr held high during the first bit only. Shouldn't to hard to figure out.

    HTH
    /Henrik Olsson.

  3. #3
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    Well, I have tried holding PLsr high the whole time. What this does is latch a new bit to the SR each time CLKsr goes high. This results in a count of either all 1's or 0's. I had also been using SHIFTIN mode 3. However, I just found that I could drive PLsr CLKsr high then both low and use mode 1 to read the bit before the clock signal. That way I get the bit that is already in the SR at the start of the SHIFTIN command. Victory!!! Thanks for the help.

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