It looks like your bin_bcd routine was writen for a 16F part. RLF is not an 18F instruction.
The 18F equivalent would be RLCF.
Also FSR and INDF are different on the 18F parts. You have FSR0, FSR1, FSR2, and INDF0,
INDF1, INDF2. See the 18F data sheet for details. You'll need to make a few changes to
compile this for an 18F.
Your example compiles fine with these changes to bin_bcd;
Code:
bin_bcd:
asm
;******************************************************************
; Convert 32-bit binary number at <bin> into a bcd number
; at <bcd>. Uses Mike Keitz's procedure for handling bcd
; adjust; Modified Microchip AN526 for 32-bits.
b2bcd movlw 32 ; 32-bits
movwf _ii ; make cycle counter
clrf _bcd ; clear result area
clrf _bcd+1
clrf _bcd+2
clrf _bcd+3
clrf _bcd+4
b2bcd2 movlw _bcd ; make pointer
movwf fsr0
movlw 5
movwf _cnt
; Mike's routine:
b2bcd3 movlw 0x33
addwf indf0,f ; add to both nybbles
btfsc indf0,3 ; test if low result > 7
andlw 0xf0 ; low result >7 so take the 3 out
btfsc indf0,7 ; test if high result > 7
andlw 0x0f ; high result > 7 so ok
subwf indf0,f ; any results <= 7, subtract back
incf fsr0,f ; point to next
decfsz _cnt
goto b2bcd3
rlcf _binary+3,f ; get another bit
rlcf _binary+2,f
rlcf _binary+1,f
rlcf _binary+0,f
rlcf _bcd+4,f ; put it into bcd
rlcf _bcd+3,f
rlcf _bcd+2,f
rlcf _bcd+1,f
rlcf _bcd+0,f
decfsz _ii,f ; all done?
goto b2bcd2 ; no, loop
; yes
endasm
return
I can't say if it works or not, but it does compile without a single error.
Bookmarks