I want to use Darrel Taylor's interrupts for an application with 16F677 and PBP V2.47 to read steps with a

mechanical encoder with detent -Bourns ECW1JB24-B00024. I only have RA0 and RA3 available for reading outputs A and

B and I could use MC14490 for cleaning/debouncing A, B mechanical outputs if really necessary. I pretend to use

basic Ioannis idea seen at message -New approach to Rotary Encoder- I need to say I am a newcomer to assembler

language. My idea is to set 2 different interrupts: A associated with port RA0 and B with port RA3 to simplify

encoder reading. The basic idea is while one interrupt is on the other is disabled

ASM
INT_LIST macro ; IntSource, Label, Type, ResetFlag?
INT_Handler RAC_INT, _ENCODERA, PBP, yes
INT_Handler RAC_INT, _ENCODERB, PBP, yes
INT_CREATE ; Creates the interrupt processor

ENDASM

@ INT_ENABLE RAC_INT ; enable external RA interrupts
OPTION_REG.6=0 ;Int on falling edge. Is it possible?
IOCA.0=1 ;Enable INT A0
IOCA.3=1 ;Enable INT A3

'---[INT - interrupt handlers]---------------------------------------------------
ENCODERA:
IOCA.3=0 ;Disable INT A3
Pause 1 ;Avoid RA0 reading during bouncing
If PORTA.0=0 then
Counter=Counter+1
lcdout $fe,$c0,#Counter
Endif
while PORTA.0=0 or PORTA.3=0:Pause 1:wend ' while RA=0 standby + debounce time
IOCA.3=1 ;Enable INT A3
@ INT_ENABLE RAC_INT ; enable interrupts Is it necessary?

@ INT_RETURN

ENCODERB:
IOCA.0=0 ;Disable INT A0
Pause 1 ;Avoid RA3 reading during bouncing
If PORTA.3=0 then
Counter=Counter-1
lcdout $fe,$c0,#Counter
Endif
while PORTA.0=0 or PORTA.3=0ause 1:wend ' while RA=0 standby + debounce time
IOCA.0=1 ;Enable INT A0
@ INT_ENABLE RAC_INT ; enable interrupts Is it necessary?

@ INT_RETURN

'-------------------------------------------------------
'Main program
'-------------------------------------------------------

-Is it OK to set interrupts the way I do, outside assembler block and after @INT_ENABLE RAC_INT sentence?
-Is it possible to disable for example INT A3 while inside INT A0 with IOCA register?
-Is the sentence @ INT_ENABLE RAC_INT OK for enable both interrupts? or IOCA register can do the same?
-Francesc