Since storage requirements for the 18F252 I left and walked to get on 18f2620 lcd dsplay question marks instead of the value of variables that I use. This problem only affects the contents of variables, the world's other writing appear correctly. Someone has already had this problem? I enclose the listing. thanks very much.


' PIC Defines
' ===========
@ __CONFIG _CONFIG1H, _IESO_OFF_1H & _FCMEN_OFF_1H & _OSC_INTIO7_1H
' Oscillator Switch-over Disabled
' Fail-Safe clock Monitor Disabled
' Set for Internal Oscillator RA7 Enabled
@ __CONFIG _CONFIG2L, _BOREN_OFF_2L & _PWRT_OFF_2L
' Brown-Out Reset Enabled
' Power-On Timer Enabled
' Brown-Out Trip set to 4.2v
@ __CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_128_2H
' WatchDog is OFF
' Watchdog Postscaler set to 1:128

@ __CONFIG _CONFIG3H, _MCLRE_ON_3H & _PBADEN_OFF_3H & _CCP2MX_PORTC_3H
' MCLR is OFF (internal)
' PortB 4:0 is digital on Reset
' CCP2 is Multiplexed with PortC.1
@ __CONFIG _CONFIG4L, _STVREN_OFF_4L & _LVP_OFF_4L & _DEBUG_OFF_4L
' Stack Under/Overflow will Reset System
' Enhanced CPU Addressing Disabled
' Low-Voltage Programming is OFF
' DEBUG is Disabled

OSCCON = %11111110 'Internal 8 mhz Osc and stable
'OSCTUNE.6=1 ' MOLTIPLICATORE PLL X4
CMCON = %00000111 'Comparators Off


DEFINE OSC 8 ' Clock a 8 Mhz
INTCON2.7=0 'ABILITA PORTB PULLUP


A var BYTe

DEFINE LCD_BITS 4 'NUMERO LINEE DI COMANDO 4 O 8
DEFINE LCD_DREG PORTB 'PORTA ChE GESTISCE LCD
DEFINE LCD_DBIT 4 'BIT INIZIALE BUS
DEFINE LCD_RSREG PORTB 'PORTA CHE GESTISCE RS
DEFINE LCD_RSBIT 2 'BIT CHE GESTISCE RS
DEFINE LCD_EREG PORTB 'PORTA CHE GESTISCE E
DEFINE LCD_EBIT 3 'PIN CHE GESTISCE IL SEGNALE E
DEFINE LCD_LINES 2 'NUMERO LINEE LCD

LCDOUT $FE,1
PAUSE 500
LCDOUT $FE,1,"CIAO MAMMA" 'THIS IS DISPLAYED OK
PAUSE 1000
LCDOUT $FE,1

for a=1 to 10
LCDOUT $FE,DEC2 A 'HERE ARE DISPLAYED: ??????????
PAUSE 500
next a

END