Hi Jim,
You won't be dissapointed with your LOGIC!
It does sound like the PIC outputs are driving something capacitive. You mention a cable which obviously is capacitive to some extent. However,...
Type: Posts; User: HenrikOlsson; Keyword(s):
Re: Shiftout data needs to be sent on rising edge of clock
Hi Jim,
You won't be dissapointed with your LOGIC!
It does sound like the PIC outputs are driving something capacitive. You mention a cable which obviously is capacitive to some extent. However,...
Re: Shiftout data needs to be sent on rising edge of clock
Hi Jim,
At 16Mhz you should have even more delay between the datapin going "true" and the rising edge of the clock - have you verified that it's actually running at 16MHz? (Can't see how that would...
Re: Shiftout data needs to be sent on rising edge of clock
Hi Jim,
I just tried it here, 18F25K20 running at 64MHz.
TRISC = %10000000 '
TRISB = %00000000 '
Datapin var PortB.7 ;
Clockpin var PortB.6 ...
Re: Shiftout data needs to be sent on rising edge of clock
Hi Jim,
According to the manual both MODE 0 (LSBFIRST) and 1 (MSBFIRST) idles the clock LOW.
Are you saying that, when using either MODE 0 or 1, the databit isn't true on the rising edge?
...