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  1. Re: Shiftout data needs to be sent on rising edge of clock

    Henrik,
    I am happy with the Logic. At first when I opened the case I thought they forgot to package the device until I realized how small it is! Very nice device. I was only able to sample...
  2. Re: Shiftout data needs to be sent on rising edge of clock

    Henrik,
    I tested the signals again on the scope at the PIC pins and although the data signal is well over the falling edge it is also over the rising edge, so the SPI should be working. I will need...
  3. Re: Shiftout data needs to be sent on rising edge of clock

    Henrik,
    I had the scope connected after the 3.9k resistors. I have the resistors connected directly to the PIC pins for protection and then I run wires (About 6" to a connector which goes directly...
  4. Re: Shiftout data needs to be sent on rising edge of clock

    Henrik,
    Thanks for helping me with this. I don't know why my setup is showing the data slightly after the rising edge. I am using a similar micro (18f26k22), only I am using the internal Osc at...
  5. Re: Shiftout data needs to be sent on rising edge of clock

    Henrik,
    Yes, on Mode 1 the databit is just starting to climb. Any bit following a zero doesn't register, but if two bits in a row are sent the second one will register since the data stays high.
    ...
  6. Shiftout data needs to be sent on rising edge of clock

    I have a chip that needs to read SPI data on the rising edge of the clock. The shiftout command seems to always send the data on the falling edge and I can't find any settings to change that. The...
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