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  1. Re: Spi flash example - 4kb/32kb/64kb erase support / winbond 25q series

    had some issues with the bsy_chk routine , when multi Flash_Blk64_Erase routine called ,
    the first 64 block would erase ok , but the 2nd call and onwards would not be done

    the bsy_chk routine...
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    Re: Pic18f25q10?

    be nice if they released a larger program space of 160kb of 8 bit chips , it areas from datasheets they have reserved the space for it
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    TM1637 - display module include example

    Hi guys ,

    have had a need to use the TM1637 4 digit display module

    please refer to link for the display module circuit and display unit used
    ...
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    Re: Tm1637 libary - has it been done

    also take a look at the circuit info for this module

    http://www.picbasic.co.uk/forum/showthread.php?t=23968
  5. 3642bh display module pinouts on tm1637 module

    not finding the display pin outs for 3642BH used in TM1637 4 DIGIT MODULE , common anode , center colon , no DP on digits

    i thought i would mod a drawing and put it here so it may be found by...
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    Re: IOC on the 27k40

    yes your correct, in that i could have turned off the IOC port trigger in neg or Pos , which ever was set , but the main toggling the IOC enable wont work as prev k22,k80 where it will stop the IOC...
  7. Re: Normal i/o required on portc , pin6, 7 18f27k40

    i will later this coming month start to try and get a bootloader working for the 27k40 , as i really like to get away from iscp programing of chips
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    IOC on the 27k40

    Hi guys

    The IOC options on this chip are very good , with both neg/ pos trig selection on most of the ports

    The dt_int18-34c currently does not appear the clear IOCxF bits after being...
  9. Re: Normal i/o required on portc , pin6, 7 18f27k40

    another thing to note on the 2xk40 ,4xK40 , is that usart 2 default pins share the ISCP pins

    although notes on PBP3.1.1 for the k40 indicate a possible ISCP lockout can occur , i have not had...
  10. Re: Normal i/o required on portc , pin6, 7 18f27k40

    yes i checked that the lat registers were contiguous so use the offset works fine

    i am thinking that the devices that use bi direction pins such as usarts , need the PPS set to be off if those...
  11. Re: Normal i/o required on portc , pin6, 7 18f27k40

    hi tumbleweed, i will look further

    but here is what i have , which i agree with you PPS should not effect portC with the config i have

    but i without the RC6pps =0 ,RC7PPS= 0 the pins are...
  12. Re: Normal i/o required on portc , pin6, 7 18f27k40

    hi dave

    well setting
    RC6PPS = 0
    RC7PPS = 0

    allowed the pins to work as I/O on portc pins6,7, in this case both pins are outputs
    prior to the above command both pins were high by...
  13. Re: Normal i/o required on portc , pin6, 7 18f27k40

    thanks mike ill give that ago ,


    i have not locked down pps at any point so i should not need to unlock it , from what i currenlty understand of the k40 series
  14. Normal i/o required on portc , pin6, 7 18f27k40

    Hi guys , wondering if anyone has config set the normal port c i/o pins 6, 7 for the 18f27k40 , as it appears to not respond ,

    the portc pins 6,7 can be used as Usart1 , but i require it to be...
  15. Re: 18f27k40 - timer0 changes from K22, K80 series 8bit/16bit mode

    also be aware now of the errata on timer0 k40 series , T0ASYNC bit problem , when FOSC/4 clock source

    8750
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    Re: Datasheet 18f27/47k40 errors

    sorry yes my copy was the older version of errata
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    Re: Datasheet 18f27/47k40 errors

    new errata for 18f27/47k40 chips today
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    Re: Datasheet 18f27/47k40 errors

    new datasheet released it seems , had pickup these errors by the looks
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    Datasheet 18f27/47k40 errors

    Over the last 2 weeks been reading the 27k40 /47k40 datasheets

    i was looking to design with the 47k40 with TQFN 44 package

    I have found the Pin allocation table ( table 2 ) does not match...
  20. Re: 18f27k40 - timer0 changes from K22, K80 series 8bit/16bit mode

    oh and when i first setup this original code, back some years back i refereed to this calculator, so dont use this calc for timer 0 for k40


    8742
  21. Re: 18f27k40 - timer0 changes from K22, K80 series 8bit/16bit mode

    thanks guys

    i am running at 32mhz , so a few changes , its nice have both the prescaller and the postscaller something that timer0 never had , and without it 10ms in 8bit mode functioning in...
  22. 18f27k40 - timer0 changes from K22, K80 series 8bit/16bit mode

    Hi guys ,

    found few changes on how timer0 on this chip implements the 8bit mode and the values set in TMR0L and TMR0H from the K80, K22 series

    apart from the changes in TMR0 registers and...
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    Re: Error when compiling with DT_INTS_3_4b"

    thanks guys
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    Re: Error when compiling with DT_INTS_3_4b"

    ok found the problem

    an include that is common to the project uses enable /disable RBC_INT , which does not exist on the 27k40

    hows ever i need to enable/disable RBC_INT when its 46k80 but...
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    Re: Error when compiling with DT_INTS_3_4b"

    hi DAVE

    i am also getting some compile errors , that not sure why ,

    using DT_INTS-18_34c for the 18F24K40 , no priority is used
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