its best to be correct for future reference , not all i2c devices are so forgiving
Type: Posts; User: richard; Keyword(s):
its best to be correct for future reference , not all i2c devices are so forgiving
as maybe but you are still incorrect , if you use a logic analyzer you will see the transaction ends abnormally
wrong way
i2cwrite ldta, lclk, adr, cnt
correct way
i2cwrite ldta, lclk,...
not in my view
addr var byte
addr= $46
i2cwrite sda,sck,addr,[opecode]
i2cread sda,sck,addr,[dat.highbyte,dat.lowbyte]
9x2x8 lcd "command delays" per text line is probably the worst delay
your snippet lacks that exact detail
the st7920 chip has a spi i/f that's a little faster and uses less pins too
there...
its called two's compliment , no magic involved
https://en.wikipedia.org/wiki/Two%27s_complement
each and every i2c command has incorrect syntax
only if you interpret it incorrectly and ignore the sign bit
show your code
what does get bad mean ?
show your code
what have you tried ?
in what way does it not provide a correct result?
signed divides, multiplies and shifts need proper handling of the sign bit
otherwise as long as the vars match in type...
a Pic12F629 has no adc module ADCIN Potar,PotADC is never going to fly use a Pic12F675
also if you post code please put it in code tags 9220
What is a package.?
What else is sent ?
Are interrupts involved ?
My best guess is that the trouble is in the code not shown and that snippets are a yet again a pointless waste of time and effort
i would be quite interested in seeing your theory on how consistent incremental distance data
at 1m resolution can be extracted from a low cost GPS receiver at any rate let alone 5 times a second
using pbp "high level" commands with LATX registers is a great way to introduce hard to find bugs in your code
5 stars
it doesn't, LOW lata.6 turns the PLL OFF as with HIGH lata.6
porta address + 18 = trisa
lata address + 18 = osctune on that chip [it varies]
all pbp "high level" commands that set a...
not surprising at all. using pbp "high level" commands like HIGH,LOW is not allowable
with LATX registers . its in the manual
what about as part of an "interesting" mosaic along with other obsolete electronic parts inlaid into a coffee table
using a clear epoxy
it would totally depend on what version of pbp you use and how many pins you need
anything with pps [ PERIPHERAL PIN SELECT (PPS) MODULE ] is a good start
16F88 is best used as landfill :tongue:
For chips with multiple mssp modules microchip define sspcon and ssp1con to be equal , ditto for the rest of the mssp regs.
If you have only one mssp then ssp1con etc are not defined .you can...
charlieplexed correctly latx regs are not required at all
its called charlieplexing, forum examples abound
not easily its a skimpy minimalist thing for pic16's, bitmaps are possible
if you use a pic18 {with enough resources} i have a fancier method
u can make your own font up to quite large [from...
but how is it wired , what will make the columns change state the rows are set to all 1's the initial col port pins are set to all 1's
where can a o come from ?
usually a zero or a one is...
what makes the pins change state ?
since pbp has no nibble var type i would guess that
keyn(ix)=kin ' read the row inputs into nibbles of key0
becomes
keyn = keyn & ~$0f<<(ix*4);clear nibble
keyn = keyn | kin<<(ix*4);load...
post #90 for the include
'****************************************************************'
* Name : ssd1306_I2C.INC *
'* Author : richard ...