Tiny bootloader and pbp

hi guys ,
i would like to try to use the tiny bootloader and PBP to make the bootloader hex file ,

has anyone an example of how to make this work for 18f67k22 chip , or k40 chip series


cheers

sheldon

Sheldon, Just modify this file extension from .txt to .asm. Then modify for the frequency and chip config and then assemble with MPLABX to get the .hex file for flashing. Then use TinyMultiBootLoader.

hi dave

yes found the file as part of the references for tiny bootloader

i have mplabx , but compiler for pbp loaded only

it appears to need c compiler ??

would like to rewrite file so that is loaded as pbp file and compile in pbp , where i can take a copy of the my existing chip structure and make the hex file

doing this approach allows for an easy migration of other chips support for the bootloader using pbp

have you a version example that could be used in pbp to make the hex file

Sheldon, You don't have to compile it as the source ia already an .ASM file. It only needs to be assembled with MPLABX. That will give you an .HEX BootLoader file that needs to be FLASHED into the processor.

sent you PM on this

cheers
sheldon

Sheldon, Where did you get the .ASM file for the processor? Looking at and comparing the two different files the one that you modified is rather old from 2016.01.15 revision 5 and the one I sent you is from 2018.04.18 revision 6. There are only a few values that need to be changed for it to assemble.

it was with the version from the download site

bootloader pc v0.11.2.11


https://sourceforge.net/projects/tinypicbootload/
https://sourceforge.net/p/tinypicboo...z_19200_r5.asm


lookd like the ver you have is not the same as i have found on the download site

can you link me to where you found that version and the other files ?

ok have have used your asm and filled it it

here the results - i am assuming i have the got mplab setup correctly

Code:

---


radix DEC
list  p=18f87k22
        ; change these lines accordingly to your application       
#include "pic18f87k22.inc"
IdTypePIC = 0x6F                ; Please refer to the table below, must exists in "piccodes.ini"       
#define max_flash  0x20000        ; in WORDS, not bytes!!! (= 'max flash memory' from "piccodes.ini" divided by 2), Please refer to the table below
#define        SELECTEUSART 1                ; EUSART(1/2), Please refer to the table below
#define        PDIP 80                        ; PIN Count of Device (64/80), Please refer to the table below

xtal        EQU        64000000        ; you may also want to change: _HS_OSC _XT_OSC
baud        EQU        19200                ; standard TinyBld baud rates: 115200 or 19200

;  The above 7 lines can be changed and buid a bootloader for the desired frequency (and PIC type)

; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+
; |IdTypePIC| Device | Write_Page | Erase_Page |  TX1/TX2  |  RX1/RX2  | max_flash | EEPROM | TQFP |
; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+
; |  0x6C  |18F65K22|  32 words  |  32 words  |C6(31)/G1(4) |C7(32)/G2(5) |  0x8000  |  1024  |  64  |
; |  0x6C  |18F85K22|  32 words  |  32 words  |C6(37)/G1(6) |C7(38)/G2(7) |  0x8000  |  1024  |  80  |
; |  0x66  |18F66K22|  32 words  |  32 words  |C6(31)/G1(4) |C7(32)/G2(5) |  0x10000  |  1024  |  64  |
; |  0x66  |18F86K22|  32 words  |  32 words  |C6(37)/G1(6) |C7(38)/G2(7) |  0x10000  |  1024  |  80  |
; |  0x6F  |18F67K22|  64 words  |  64 words  |C6(31)/G1(4) |C7(32)/G2(5) |  0x20000  |  1024  |  64  |
; |  0x6F  |18F87K22|  64 words  |  64 words  |C6(37)/G1(6) |C7(38)/G2(7) |  0x20000  |  1024  |  80  |
; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+

 #IF (SELECTEUSART == 1)
#define _TXSTA TXSTA1
#define _SPBRG SPBRG1
#define _RCSTA RCSTA1
#define _TXREG TXREG1
#define _PIR PIR1
#define _RCIF RC1IF
 #ELSE
#define _TXSTA TXSTA2
#define _SPBRG SPBRG2
#define _RCSTA RCSTA2
#define _TXREG TXREG2
#define _PIR PIR3
#define _RCIF RC2IF
 #ENDIF

        ;********************************************************************
        ;        Tiny Bootloader                18F6XK22/18F8XK22  Size=100/132words
        ;      [email protected]
        ;      http://www.etc.ugal.ro/cchiculita/software/picbootloader.htm
        ;        (2018.04.18 Revision 6)
        ;
        ;        This program is only available in Tiny Multi Bootloader +.
        ;
        ;        Tiny Multi Bootloader +
        ;        https://sourceforge.net/projects/tinypicbootload/
        ;
        ;********************************************************************

        #include "spbrgselect.inc"        ; RoundResult and baud_rate

#if(IdTypePIC == 0x6F)
                #define first_address max_flash-264                ;132 words
#else
                #define first_address max_flash-200                ;100 words
#endif
        ;Setup CONFIG1L
                config RETEN = ON        ;Enabled - Controlled by SRETEN bit
                config INTOSCSEL = HIGH        ;LF-INTOSC in High-power mode during Sleep
                config SOSCSEL = DIG        ; Digital (SCLKI) mode; I/O port functionality of RC0 and RC1 is enabled
                config XINST = OFF        ;Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
        ;Setup CONFIG1H
                config FOSC = HS2        ; HS oscillator (High power, 16 MHz - 25 MHz) - makes OSC1 input PREAMP active for TCXO 16.386 0.8VPP
                config PLLCFG = ON        ;PLL x4 Enable bit Disabled
                config FCMEN = OFF        ;Fail-Safe Clock Monitor disabled
                config IESO = OFF        ;Oscillator Switchover mode disabled
        ;Setup CONFIG2L
                config PWRTEN = ON        ;PWRT enabled
                config BOREN = SBORDIS  ; Enabled in hardware, SBOREN disabled
                config BORV = 2                ;VBOR set to 2 V nominal
                config BORPWR = ZPBORMV ; ZPBORMV instead of BORMV is selected
        ;Setup CONFIG2H
                config WDTEN = ON        ;WDT is controlled by SWDTEN bit of the WDTCON register
                config WDTPS = 512        ;Watchdog Timer Postscale Select bits 1:512
        ;Setup CONFIG3L
                config RTCOSC = SOSCREF        ;RTCC uses SOSC
#if (PDIP == 80)
                config EASHFT = ON        ;Address Shifting ENABLED
                config ABW = MM        ;Microprocessor mode , External Memory bus not used - allows portsD,E,H,J  for I/O use
                                        ;MM = also ignores MEMCON.7=0 (default POR)  setting for EMB use 
                config BW = 16                ;16-bit external bus mode
                config WAIT = OFF        ;Disabled
#endif
        ;Setup CONFIG3H
                config CCP2MX = PORTC        ;CCP2 input/output is multiplexed with RC1
#if (PDIP == 80)
                config ECCPMX = PORTE        ;Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3
#endif
                config MSSPMSK = MSK7        ;7 Bit address masking mode
                config MCLRE = ON        ;MCLR pin enabled RG5 input pin disabled
        ;Setup CONFIG4L
                config STVREN = OFF        ;Stack full/underflow will not cause Reset
                config BBSIZ = BB1K        ;1K word Boot Block size
                config DEBUG = OFF        ;Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins
        ;Setup CONFIG5L
                config CP0 = ON                ;  MEMORY BLOCK 0 CODE PROTECT BIT - 7KW 800h  - 3FFFh ( when 1K BOOT OPTION used )
                config CP1 = ON        ;  MEMORY BLOCK 1 CODE PROTECT BIT - 8KW 4000h - 7FFFh
                config CP2 = ON        ;  MEMORY BLOCK 2 CODE PROTECT BIT - 8KW 8000h - BFFFh
                config CP3 = ON        ;  MEMORY BLOCK 3 CODE PROTECT BIT - 8KW C000h - FFFFh
#if (IdTypePIC == 0x6F)
                config CP4 = ON        ;  MEMORY BLOCK 4 CODE PROTECT BIT - 8KW 10000h - 12FFFh
                config CP5 = ON        ;  MEMORY BLOCK 5 CODE PROTECT BIT - 8KW 14000h - 17FFFh
                config CP6 = ON        ;  MEMORY BLOCK 6 CODE PROTECT BIT - 8KW 18000h - 1BFFFh
                config CP7 = ON        ;  MEMORY BLOCK 7 CODE PROTECT BIT - 8KW 1C000h - 1FFFFh
#endif
        ;Setup CONFIG5H
                config CPB = OFF        ;Boot block not code-protected
                config CPD = ON                ;Data EEPROM  code-protected
        ;Setup CONFIG6L
                config WRT0 = OFF        ;Block 0 not write-protected
                config WRT1 = OFF        ;Block 1 not write-protected
                config WRT2 = OFF        ;Block 2 not write-protected
                config WRT3 = OFF        ;Block 3 not write-protected
#if (IdTypePIC == 0x6F)
                config WRT4 = OFF        ;Block 4 not write-protected
                config WRT5 = OFF        ;Block 5 not write-protected
                config WRT6 = OFF        ;Block 6 not write-protected
                config WRT7 = OFF        ;Block 7 not write-protected
#endif
        ;Setup CONFIG6H
                config WRTC = ON        ;Configuration registers write-protected
                config WRTB = ON        ;Boot block write-protected
                config WRTD = OFF        ;Data EEPROM not write-protected
        ;Setup CONFIG7L
                config EBRT0 = OFF        ;Block 0 not protected from table reads executed in other blocks
                config EBRT1 = OFF        ;Block 1 not protected from table reads executed in other blocks
                config EBRT2 = OFF        ;Block 2 not protected from table reads executed in other blocks
                config EBRT3 = OFF        ;Block 3 not protected from table reads executed in other blocks
#if (IdTypePIC == 0x6F)
                config EBRT4 = OFF        ;Block 4 not protected from table reads executed in other blocks
                config EBRT5 = OFF        ;Block 5 not protected from table reads executed in other blocks
                config EBRT6 = OFF        ;Block 6 not protected from table reads executed in other blocks
                config EBRT7 = OFF        ;Block 7 not protected from table reads executed in other blocks
#endif
        ;Setup CONFIG7H
                config EBRTB = OFF        ;Boot block not protected from table reads executed in other blocks

;----------------------------- PROGRAM ---------------------------------
        cblock 0
        buffer:14
        crc
        i
        flag
        cnt1
        cnt2
        cnt3
        endc
       
;0000000000000000000000000 RESET 00000000000000000000000000

                ORG    0x0000
                GOTO    IntrareBootloader

;view with TabSize=4
;&&&&&&&&&&&&&&&&&&&&&&&  START    &&&&&&&&&&&&&&&&&&&&&&
;----------------------  Bootloader  ----------------------
;PC_flash:                C1h                U                H                L                64/128  ... <64/128 bytes> ...  crc
;PC_eeprom:                C1h                40h                  EEADRH          EEADR          1                EEDATA                crc
;PC_cfg                        C1h                U OR 80h        H                L                14  ... <14 bytes>  ...  crc
;PIC_response:          type `K`
       
        ORG first_address                        ;space to deposit first 4 instr. of user prog.
        nop
        nop
        nop
        nop

        org first_address+8
IntrareBootloader:
                                                ;Init int clock & serial port
        lfsr        FSR1,_TXREG                        ;FAR1 = TXREG1 or TXREG2

        bsf        OSCCON,IRCF0                        ;int clock 16MHz

#if (SELECTEUSART == 2)
        movlb        .15                                ;bank0 -> bank15
        clrf        ANCON2,BANKED                          ; setup digital I/O
#endif

        movlw        ((1<<TXEN) | (1<<BRGH))                ;init serial port
        movwf        _TXSTA,BANKED
        movlw        spbrg_value
        movwf        _SPBRG,BANKED
        movlw        ((1<<SPEN) | (1<<CREN))
        movwf        _RCSTA,BANKED
        movlb        .0                                ;bank15 -> bank0

                                                ;wait for computer
        rcall        Receive
        sublw        0xC1                                ;Expect C1h
        bnz        way_to_exit
        movlw  IdTypePIC                        ;send PIC type
        movwf  INDF1

MainLoop:
        movlw        'C'                                ; "-Everything OK, ready and waiting."
mainl:
        movwf  INDF1
        clrf        crc
        rcall        Receive                                ;Upper
        movwf        TBLPTRU
        movwf        flag
        rcall        Receive                                ;High
        movwf        TBLPTRH
        movwf        EEADRH                                ;(for EEPROM case)
        rcall        Receive                                ;Low
        movwf        TBLPTRL
        movwf        EEADR                                ;(for EEPROM case)

        rcall        Receive                                ;Count
        movwf        i

        clrf        FSR0L                                ;FSR0 = Buffer TOP
        tblrd*-                                        ;TBLPTR = TBLPTR - 1
rcvoct:
        rcall        Receive
        btfsc        flag,7                                ;Skip if not Config
        movwf        POSTINC0                        ;(for Config case)
        movwf        EEDATA                                ;(for EEPROM case)
        movwf        TABLAT                                ;(for PFM case)
        tblwt+*
        decfsz        i,F
        bra        rcvoct

        rcall        Receive                                ;CRC
ziieroare:                                        ;CRC failed
        movlw        'N'
        bnz        mainl

        btfsc        flag,7                                ;Skip if not Config
        bra        wr_cfg                                ;Write Config
        movlw        (1<<WREN)                        ;Setup EEPROM
        btfss        flag,6                                ;Skip if EEPROM
        rcall        Erase
        rcall        Write
        bra        MainLoop

wr_cfg:
        decf        FSR0L,F                                ;FSR0 = FSR0 - 1
        movf        INDF0,W                                ;Set TABLAT
        movwf        TABLAT
        movlw        ((1<<EEPGD)|(1<<CFGS)|(1<<WREN));Setup cfg
        rcall        Write
        tblrd*-                                        ;TBLPTR = TBLPTR - 1
        tstfsz        FSR0L                                ;FSR0L = 0 ?
        bra        wr_cfg
        bra        MainLoop

;************************ Subroutines ************************

Erase:
        movlw        ((1<<EEPGD)|(1<<FREE)|(1<<WREN)); Setup erase
Write:
        movwf        EECON1
        movlw        0x55
        movwf        EECON2
        movlw        0xAA
        movwf        EECON2
        bsf        EECON1,WR
        retlw        ((1<<EEPGD)|(1<<WREN))                ; Setup writes

Receive:
        movlw        (xtal/2000000+1)                ; for 20MHz => 11 => 1second delay
        movwf        cnt1
rpt2:
        clrf        cnt2
rpt3:
        clrf        cnt3
rptc:
        btfss        _PIR,_RCIF                        ;test RX
        bra        notrcv
        incf        FSR1L,F                                ;FSR1 = RCREG1 or RCREG2 -> TXREG1 or TXREG2
        movf        POSTDEC1,W                        ;return read data in W
        addwf        crc,F                                ;compute crc
        return
notrcv:
        decfsz        cnt3,F
        bra        rptc
        decfsz        cnt2,F
        bra        rpt3
        decfsz        cnt1,F
        bra        rpt2
                                                ;timeout
way_to_exit:
        clrf        EECON1                                ; deactivate EECON
        movlb        .15
        bcf        _SPBRG,SPEN                        ; deactivate UART
        movlb        .0
        bra        first_address

;*************************************************************
; After reset
; Do not expect the memory to be zero,
; Do not expect registers to be initialised like in catalog.

            END

---

Errors shown when build done

Code:

---

ake -f nbproject/Makefile-default.mk SUBPROJECTS= .build-conf
make[1]: Entering directory 'C:/Users/SMW OFFICE/MPLABXProjects/bootloader18f87k22.X'
make  -f nbproject/Makefile-default.mk dist/default/production/bootloader18f87k22.X.production.hex
make[2]: Entering directory 'C:/Users/SMW OFFICE/MPLABXProjects/bootloader18f87k22.X'
"C:\Program Files\Microchip\xc8\v2.20\bin\xc8-cc.exe" -c  -mcpu=18F87K22  -mdfp="C:/Program Files (x86)/Microchip/MPLABX/v5.40/packs/Microchip/PIC18F-K_DFP/1.4.87/xc8"  -fno-short-double -fno-short-float -memi=wordwrite -O0 -maddrqual=ignore -xassembler-with-cpp -I"../../.mchp_packs/Microchip/PIC18F-K_DFP/1.3.84/xc8/pic/include/proc" -mwarn=-3 -Wa,-a -DXPRJ_default=default  -msummary=-psect,-class,+mem,-hex,-file  -ginhx032 -Wl,--data-init -mno-keep-startup -mno-download -mdefault-config-bits -std=c99 -gdwarf-3 -mstack=compiled:auto:auto:auto  -o build/default/production/_ext/1392730598/tinybootloadersmw18f87k22.o  ../../PROJECTS/tinybootloadersmw18f87k22.asm
../../PROJECTS/tinybootloadersmw18f87k22.asm:34:9: warning: '_TXSTA' macro redefined [-Wmacro-redefined]
#define _TXSTA TXSTA2
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:27:9: note: previous definition is here
#define _TXSTA TXSTA1
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:35:9: warning: '_SPBRG' macro redefined [-Wmacro-redefined]
#define _SPBRG SPBRG2
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:28:9: note: previous definition is here
#define _SPBRG SPBRG1
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:36:9: warning: '_RCSTA' macro redefined [-Wmacro-redefined]
#define _RCSTA RCSTA2
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:29:9: note: previous definition is here
#define _RCSTA RCSTA1
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:37:9: warning: '_TXREG' macro redefined [-Wmacro-redefined]
#define _TXREG TXREG2
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:30:9: note: previous definition is here
#define _TXREG TXREG1
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:38:9: warning: '_PIR' macro redefined [-Wmacro-redefined]
#define _PIR PIR3
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:31:9: note: previous definition is here
#define _PIR PIR1
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:39:9: warning: '_RCIF' macro redefined [-Wmacro-redefined]
#define _RCIF RC2IF
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:32:9: note: previous definition is here
#define _RCIF RC1IF
        ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:55:29: warning: extra tokens at end of #include directive [-Wextra-tokens]
        #include "spbrgselect.inc"      ; RoundResult and baud_rate
                                        ^
                                        //
../../PROJECTS/tinybootloadersmw18f87k22.asm:82:6: error: token is not a valid binary operator in a preprocessor subexpression
#if (PDIP == 80)
    ^~~~
../../PROJECTS/tinybootloadersmw18f87k22.asm:8:19: note: expanded from macro 'PDIP'
#define PDIP 80                ; PIN Count of Device (64/80), Please refer to the table below
            ~~                ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:91:6: error: token is not a valid binary operator in a preprocessor subexpression
#if (PDIP == 80)
    ^~~~
../../PROJECTS/tinybootloadersmw18f87k22.asm:8:19: note: expanded from macro 'PDIP'
#define PDIP 80                ; PIN Count of Device (64/80), Please refer to the table below
            ~~                ^
../../PROJECTS/tinybootloadersmw18f87k22.asm:180:6: error: token is not a valid binary operator in a preprocessor subexpression
#if (SELECTEUSART == 2)
    ^~~~~~~~~~~~
../../PROJECTS/tinybootloadersmw18f87k22.asm:7:25: note: expanded from macro 'SELECTEUSART'
#define SELECTEUSART 1          ; EUSART(1/2), Please refer to the table below
                    ~          ^
7 warnings and 3 errors generated.
(908) exit status = 1
nbproject/Makefile-default.mk:113: recipe for target 'build/default/production/_ext/1392730598/tinybootloadersmw18f87k22.o' failed
make[2]: Leaving directory 'C:/Users/SMW OFFICE/MPLABXProjects/bootloader18f87k22.X'
nbproject/Makefile-default.mk:91: recipe for target '.build-conf' failed
make[1]: Leaving directory 'C:/Users/SMW OFFICE/MPLABXProjects/bootloader18f87k22.X'
nbproject/Makefile-impl.mk:39: recipe for target '.build-impl' failed
make[2]: *** [build/default/production/_ext/1392730598/tinybootloadersmw18f87k22.o] Error 1
make[1]: *** [.build-conf] Error 2
make: *** [.build-impl] Error 2

BUILD FAILED (exit value 2, total time: 1s)

---

Attachment 8864

if you aren't using some ancient version of mplab then use
#include "p18f87k22.inc" not #include "pic18f87k22.inc"

hi richard

using xc8 ver 2.20 - latest i believe -

path for include show no "p18f87k22.inc" , only "pic18f87k22.inc"
unless there is another location to look for this include ?

Attachment 8865

Attachment 8866

its not C , its asm

Sheldon, Here is the source directory I use here. The forum does not allow files bigger than 1M so I can't send you the x0.11.2 executable.

thanks richard

made me go back and have a look at the files in 5.40 mplab , there is no /mpasmx directory , and i checked this 2 times by re downloading ver 5.40 being the latest version
i made the error or removing prev versions of mplab because of updating to the latest version

so now have reinstalled 5.35 , which is last version and has /mpasmx directory , and has mpasm.exe ver 5.87 , which appears to be the last version available from now on ???
after adding it to the tool chain , mplab complains that the mpasm is not supported in 64 bit systems and to migrate the project or use earlier ide

its seems microchip use of mpasmx for the 8bit chips is to be dropped


This appears to now assemble the tinybootloader file

still like to know where dave found those files as i cant find them on the source download

see if the pc software see it after its loaded

thanks dave

i have pc software from the main download site

dave , the asm asked for Xtal value , it this the real value of the external xtl of 16000000hz or the PPL4 of 64000000 value ???

dave
my pic config has currently set to protect memory , is this a problem for the bootloader ?

also what changes need to be done to the pbp code to allow bootloader to work , i have read that addtional defines are required for other bootloaders such as
DEFINE LOADER_USED 1
DEFINE RESET_ORG 800h ' For Microchip USB Bootloader
DEFINE INTERRUPT_ORG 808h ' For Microchip USB Bootloader

are these required for tiny bootloader ???

Code:

---


radix DEC
list  p=18f87k22
        ; change these lines accordingly to your application       
#include "p18f87k22.inc"
IdTypePIC = 0x6F                ; Please refer to the table below, must exists in "piccodes.ini"       
#define max_flash  0x20000        ; in WORDS, not bytes!!! (= 'max flash memory' from "piccodes.ini" divided by 2), Please refer to the table below
#define        SELECTEUSART 1                ; EUSART(1/2), Please refer to the table below
#define        PDIP 80                        ; PIN Count of Device (64/80), Please refer to the table below

xtal        EQU        64000000        ; you may also want to change: _HS_OSC _XT_OSC
baud        EQU        19200                ; standard TinyBld baud rates: 115200 or 19200

;  The above 7 lines can be changed and buid a bootloader for the desired frequency (and PIC type)

; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+
; |IdTypePIC| Device | Write_Page | Erase_Page |  TX1/TX2  |  RX1/RX2  | max_flash | EEPROM | TQFP |
; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+
; |  0x6C  |18F65K22|  32 words  |  32 words  |C6(31)/G1(4) |C7(32)/G2(5) |  0x8000  |  1024  |  64  |
; |  0x6C  |18F85K22|  32 words  |  32 words  |C6(37)/G1(6) |C7(38)/G2(7) |  0x8000  |  1024  |  80  |
; |  0x66  |18F66K22|  32 words  |  32 words  |C6(31)/G1(4) |C7(32)/G2(5) |  0x10000  |  1024  |  64  |
; |  0x66  |18F86K22|  32 words  |  32 words  |C6(37)/G1(6) |C7(38)/G2(7) |  0x10000  |  1024  |  80  |
; |  0x6F  |18F67K22|  64 words  |  64 words  |C6(31)/G1(4) |C7(32)/G2(5) |  0x20000  |  1024  |  64  |
; |  0x6F  |18F87K22|  64 words  |  64 words  |C6(37)/G1(6) |C7(38)/G2(7) |  0x20000  |  1024  |  80  |
; +---------+--------+------------+------------+-------------+-------------+-----------+--------+------+

 #IF (SELECTEUSART == 1)
#define _TXSTA TXSTA1
#define _SPBRG SPBRG1
#define _RCSTA RCSTA1
#define _TXREG TXREG1
#define _PIR PIR1
#define _RCIF RC1IF
 #ELSE
#define _TXSTA TXSTA2
#define _SPBRG SPBRG2
#define _RCSTA RCSTA2
#define _TXREG TXREG2
#define _PIR PIR3
#define _RCIF RC2IF
 #ENDIF

        ;********************************************************************
        ;        Tiny Bootloader                18F6XK22/18F8XK22  Size=100/132words
        ;      [email protected]
        ;      http://www.etc.ugal.ro/cchiculita/software/picbootloader.htm
        ;        (2018.04.18 Revision 6)
        ;
        ;        This program is only available in Tiny Multi Bootloader +.
        ;
        ;        Tiny Multi Bootloader +
        ;        https://sourceforge.net/projects/tinypicbootload/
        ;
        ;********************************************************************

        #include "spbrgselect.inc"        ; RoundResult and baud_rate

#if(IdTypePIC == 0x6F)
                #define first_address max_flash-264                ;132 words
#else
                #define first_address max_flash-200                ;100 words
#endif
        ;Setup CONFIG1L
                config RETEN = ON        ;Enabled - Controlled by SRETEN bit
                config INTOSCSEL = HIGH        ;LF-INTOSC in High-power mode during Sleep
                config SOSCSEL = DIG        ; Digital (SCLKI) mode; I/O port functionality of RC0 and RC1 is enabled
                config XINST = OFF        ;Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
        ;Setup CONFIG1H
                config FOSC = HS2        ; HS oscillator (High power, 16 MHz - 25 MHz) - makes OSC1 input PREAMP active for TCXO 16.386 0.8VPP
                config PLLCFG = ON        ;PLL x4 Enable bit Disabled
                config FCMEN = OFF        ;Fail-Safe Clock Monitor disabled
                config IESO = OFF        ;Oscillator Switchover mode disabled
        ;Setup CONFIG2L
                config PWRTEN = ON        ;PWRT enabled
                config BOREN = SBORDIS  ; Enabled in hardware, SBOREN disabled
                config BORV = 2                ;VBOR set to 2 V nominal
                config BORPWR = ZPBORMV ; ZPBORMV instead of BORMV is selected
        ;Setup CONFIG2H
                config WDTEN = ON        ;WDT is controlled by SWDTEN bit of the WDTCON register
                config WDTPS = 512        ;Watchdog Timer Postscale Select bits 1:512
        ;Setup CONFIG3L
                config RTCOSC = SOSCREF        ;RTCC uses SOSC
#if (PDIP == 80)
                config EASHFT = ON        ;Address Shifting ENABLED
                config ABW = MM        ;Microprocessor mode , External Memory bus not used - allows portsD,E,H,J  for I/O use
                                        ;MM = also ignores MEMCON.7=0 (default POR)  setting for EMB use 
                config BW = 16                ;16-bit external bus mode
                config WAIT = OFF        ;Disabled
#endif
        ;Setup CONFIG3H
                config CCP2MX = PORTC        ;CCP2 input/output is multiplexed with RC1
#if (PDIP == 80)
                config ECCPMX = PORTE        ;Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3
#endif
                config MSSPMSK = MSK7        ;7 Bit address masking mode
                config MCLRE = ON        ;MCLR pin enabled RG5 input pin disabled
        ;Setup CONFIG4L
                config STVREN = OFF        ;Stack full/underflow will not cause Reset
                config BBSIZ = BB1K        ;1K word Boot Block size
                config DEBUG = OFF        ;Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins
        ;Setup CONFIG5L
                config CP0 = ON                ;  MEMORY BLOCK 0 CODE PROTECT BIT - 7KW 800h  - 3FFFh ( when 1K BOOT OPTION used )
                config CP1 = ON        ;  MEMORY BLOCK 1 CODE PROTECT BIT - 8KW 4000h - 7FFFh
                config CP2 = ON        ;  MEMORY BLOCK 2 CODE PROTECT BIT - 8KW 8000h - BFFFh
                config CP3 = ON        ;  MEMORY BLOCK 3 CODE PROTECT BIT - 8KW C000h - FFFFh
#if (IdTypePIC == 0x6F)
                config CP4 = ON        ;  MEMORY BLOCK 4 CODE PROTECT BIT - 8KW 10000h - 12FFFh
                config CP5 = ON        ;  MEMORY BLOCK 5 CODE PROTECT BIT - 8KW 14000h - 17FFFh
                config CP6 = ON        ;  MEMORY BLOCK 6 CODE PROTECT BIT - 8KW 18000h - 1BFFFh
                config CP7 = ON        ;  MEMORY BLOCK 7 CODE PROTECT BIT - 8KW 1C000h - 1FFFFh
#endif
        ;Setup CONFIG5H
                config CPB = OFF        ;Boot block not code-protected
                config CPD = ON                ;Data EEPROM  code-protected
        ;Setup CONFIG6L
                config WRT0 = OFF        ;Block 0 not write-protected
                config WRT1 = OFF        ;Block 1 not write-protected
                config WRT2 = OFF        ;Block 2 not write-protected
                config WRT3 = OFF        ;Block 3 not write-protected
#if (IdTypePIC == 0x6F)
                config WRT4 = OFF        ;Block 4 not write-protected
                config WRT5 = OFF        ;Block 5 not write-protected
                config WRT6 = OFF        ;Block 6 not write-protected
                config WRT7 = OFF        ;Block 7 not write-protected
#endif
        ;Setup CONFIG6H
                config WRTC = ON        ;Configuration registers write-protected
                config WRTB = ON        ;Boot block write-protected
                config WRTD = OFF        ;Data EEPROM not write-protected
        ;Setup CONFIG7L
                config EBRT0 = OFF        ;Block 0 not protected from table reads executed in other blocks
                config EBRT1 = OFF        ;Block 1 not protected from table reads executed in other blocks
                config EBRT2 = OFF        ;Block 2 not protected from table reads executed in other blocks
                config EBRT3 = OFF        ;Block 3 not protected from table reads executed in other blocks
#if (IdTypePIC == 0x6F)
                config EBRT4 = OFF        ;Block 4 not protected from table reads executed in other blocks
                config EBRT5 = OFF        ;Block 5 not protected from table reads executed in other blocks
                config EBRT6 = OFF        ;Block 6 not protected from table reads executed in other blocks
                config EBRT7 = OFF        ;Block 7 not protected from table reads executed in other blocks
#endif
        ;Setup CONFIG7H
                config EBRTB = OFF        ;Boot block not protected from table reads executed in other blocks

;----------------------------- PROGRAM ---------------------------------
        cblock 0
        buffer:14
        crc
        i
        flag
        cnt1
        cnt2
        cnt3
        endc
       
;0000000000000000000000000 RESET 00000000000000000000000000

                ORG    0x0000
                GOTO    IntrareBootloader

;view with TabSize=4
;&&&&&&&&&&&&&&&&&&&&&&&  START    &&&&&&&&&&&&&&&&&&&&&&
;----------------------  Bootloader  ----------------------
;PC_flash:                C1h                U                H                L                64/128  ... <64/128 bytes> ...  crc
;PC_eeprom:                C1h                40h                  EEADRH          EEADR          1                EEDATA                crc
;PC_cfg                        C1h                U OR 80h        H                L                14  ... <14 bytes>  ...  crc
;PIC_response:          type `K`
       
        ORG first_address                        ;space to deposit first 4 instr. of user prog.
        nop
        nop
        nop
        nop

        org first_address+8
IntrareBootloader:
                                                ;Init int clock & serial port
        lfsr        FSR1,_TXREG                        ;FAR1 = TXREG1 or TXREG2

        bsf        OSCCON,IRCF0                        ;int clock 16MHz

#if (SELECTEUSART == 2)
        movlb        .15                                ;bank0 -> bank15
        clrf        ANCON2,BANKED                          ; setup digital I/O
#endif

        movlw        ((1<<TXEN) | (1<<BRGH))                ;init serial port
        movwf        _TXSTA,BANKED
        movlw        spbrg_value
        movwf        _SPBRG,BANKED
        movlw        ((1<<SPEN) | (1<<CREN))
        movwf        _RCSTA,BANKED
        movlb        .0                                ;bank15 -> bank0

                                                ;wait for computer
        rcall        Receive
        sublw        0xC1                                ;Expect C1h
        bnz        way_to_exit
        movlw  IdTypePIC                        ;send PIC type
        movwf  INDF1

MainLoop:
        movlw        'C'                                ; "-Everything OK, ready and waiting."
mainl:
        movwf  INDF1
        clrf        crc
        rcall        Receive                                ;Upper
        movwf        TBLPTRU
        movwf        flag
        rcall        Receive                                ;High
        movwf        TBLPTRH
        movwf        EEADRH                                ;(for EEPROM case)
        rcall        Receive                                ;Low
        movwf        TBLPTRL
        movwf        EEADR                                ;(for EEPROM case)

        rcall        Receive                                ;Count
        movwf        i

        clrf        FSR0L                                ;FSR0 = Buffer TOP
        tblrd*-                                        ;TBLPTR = TBLPTR - 1
rcvoct:
        rcall        Receive
        btfsc        flag,7                                ;Skip if not Config
        movwf        POSTINC0                        ;(for Config case)
        movwf        EEDATA                                ;(for EEPROM case)
        movwf        TABLAT                                ;(for PFM case)
        tblwt+*
        decfsz        i,F
        bra        rcvoct

        rcall        Receive                                ;CRC
ziieroare:                                        ;CRC failed
        movlw        'N'
        bnz        mainl

        btfsc        flag,7                                ;Skip if not Config
        bra        wr_cfg                                ;Write Config
        movlw        (1<<WREN)                        ;Setup EEPROM
        btfss        flag,6                                ;Skip if EEPROM
        rcall        Erase
        rcall        Write
        bra        MainLoop

wr_cfg:
        decf        FSR0L,F                                ;FSR0 = FSR0 - 1
        movf        INDF0,W                                ;Set TABLAT
        movwf        TABLAT
        movlw        ((1<<EEPGD)|(1<<CFGS)|(1<<WREN));Setup cfg
        rcall        Write
        tblrd*-                                        ;TBLPTR = TBLPTR - 1
        tstfsz        FSR0L                                ;FSR0L = 0 ?
        bra        wr_cfg
        bra        MainLoop

;************************ Subroutines ************************

Erase:
        movlw        ((1<<EEPGD)|(1<<FREE)|(1<<WREN)); Setup erase
Write:
        movwf        EECON1
        movlw        0x55
        movwf        EECON2
        movlw        0xAA
        movwf        EECON2
        bsf        EECON1,WR
        retlw        ((1<<EEPGD)|(1<<WREN))                ; Setup writes

Receive:
        movlw        (xtal/2000000+1)                ; for 20MHz => 11 => 1second delay
        movwf        cnt1
rpt2:
        clrf        cnt2
rpt3:
        clrf        cnt3
rptc:
        btfss        _PIR,_RCIF                        ;test RX
        bra        notrcv
        incf        FSR1L,F                                ;FSR1 = RCREG1 or RCREG2 -> TXREG1 or TXREG2
        movf        POSTDEC1,W                        ;return read data in W
        addwf        crc,F                                ;compute crc
        return
notrcv:
        decfsz        cnt3,F
        bra        rptc
        decfsz        cnt2,F
        bra        rpt3
        decfsz        cnt1,F
        bra        rpt2
                                                ;timeout
way_to_exit:
        clrf        EECON1                                ; deactivate EECON
        movlb        .15
        bcf        _SPBRG,SPEN                        ; deactivate UART
        movlb        .0
        bra        first_address

;*************************************************************
; After reset
; Do not expect the memory to be zero,
; Do not expect registers to be initialised like in catalog.

            END

---

Attachment 8876

Code:

---

IntrareBootloader:
                                                ;Init int clock & serial port
        lfsr        FSR1,_TXREG                        ;FAR1 = TXREG1 or TXREG2


        bsf        OSCCON,IRCF0                        ;int clock 16MHz

---

can't see how that will be ok

1. at por OSCCON IRCF0 and IRCF0 are both set anyway and will not result in a 16mhz clock
2. you have pll on selected in config so clk will be 64mhz yet no attempt is made to wait for pll ready state to establish

richard

YES , your correct , there is no test to see if the internal clock or in this case external tcxo is ready,
in my normal pbp i there is wait to check this , but not in the bootloader code

comment of 16 mhz is generic for the file , i not changed it

loaded the file bootloader file , via programmer

but the com port does not detect the device
have no rts/dtr avaialble -
used com7(usb interface) - usart1 19200 ( rx1 - rc7 pin , tx1 - rc6 pin)
tried manual rest and remote signal - looking for 65,66,67 , which i am assuming the bootloader has setup somewhere , but i cant see it

usart1 is connected to a usb to serial ttl converter ch340 driver

removed all memory code protect in cchip config for bootloader , just as test

any sugestions

Quote:

---

tried manual rest and remote signal - looking for 65,66,67 , which i am assuming the bootloader has setup somewhere , but i cant see it

---

if you can't see it its likely not there.


looks to me like the bootloader sits mute till the pc speaks

the code says
;Expect C1h

and responds
IdTypePIC ;send PIC type



ps, if you have not fixed the fosc problems it wont work anyway, at least post code of what you are trying

the bootloader pc app does not see the bootloader code serial port - untill it does the other steps are mute

i have removed my config and just used the base standard 18f87k22 chip confg - 16mhz internal , no PPL4 , no protection etc
build asm with MASM 5.86 , with options as build in absolute mode , it has the correct hex format INHX32

i have serveral other chip set of 18f46k80 , 18f47k40 to make this work on

I have the referance dave given me for the 18f46k80 series , will need a k40 version

so have built that with the default chip config setting for the 18f46k80, usart 2 19200 ( for this device)

THE BOOTLOADER PC SOFTWARE SEE IT "Yay" on manual reset
and it bootloader pc software finds the base code config

so ill continue to work on 18f46k80 bootloader and put in my chip config

I am still unclear what changes i need to make to my orignal pic code for the bootloader to allow it to work

this is going to be long project stage i think

cheers

Sheldon, The only statement required for PBP is the "DEFINE LOADER_USED 1" at the top of the program.

thanks dave


prior to bootloader use and relating to the config of the pic protection memory blocks i had protected boot blocks
and most of memory blocks

which of these now cant be protected cos of the bootloader use ?

which setting can be further locked down if using a bootloader ?

Code:

---


;----- CONFIG5L Options -------------------------------------------------- 
   
    CONFIG CP0      = ON        ;  MEMORY BLOCK 0 CODE PROTECT BIT - 7KW 800h  - 3FFFh ( when 1K BOOT OPTION used )
    CONFIG CP1      = ON        ;  MEMORY BLOCK 1 CODE PROTECT BIT - 8KW 4000h - 7FFFh
    CONFIG CP2      = ON        ;  MEMORY BLOCK 2 CODE PROTECT BIT - 8KW 8000h - BFFFh
    CONFIG CP3      = ON        ;  MEMORY BLOCK 3 CODE PROTECT BIT - 8KW C000h - FFFFh
 
 
;----- CONFIG5H Options -------------------------------------------------- 
  CONFIG  CPD      = OFF        ; EEPROM DATA PREOTECT BIT - EXTERNAL R/W
  CONFIG  CPB      = ON        ; BOOT BLOCK CODE PROTECT BIT

;----- CONFIG6L Options -------------------------------------------------- 
    CONFIG WRT0      = OFF        ; MEMORY BLOCK WRITE PROTECT BIT
    CONFIG WRT1      = OFF
    CONFIG WRT2      = OFF
    CONFIG WRT3      = OFF
 
 
;----- CONFIG6H Options -------------------------------------------------- 
    CONFIG WRTD      = OFF      ; EEPROM WRITE PROTECT BIT - INTERNAL AND EXTERNAL
    CONFIG WRTB      = ON        ; BOOT BLOCK WRITE PROTECT
    CONFIG WRTC      = ON        ; CONFIGURATION REGISTER WRITE PROTECT BIT
 
;----- CONFIG7L Options -------------------------------------------------- 
    CONFIG EBTR0    = OFF      ; MEMORY READ TABLE BLOCK PROTECT
    CONFIG EBTR1    = OFF
    CONFIG EBTR2    = OFF
    CONFIG EBTR3    = OFF
   
;----- CONFIG7H Options -------------------------------------------------- 
    CONFIG EBTRB    = OFF      ; TABLE READ PROTECT BOOT

---

prior to bootloader

Sheldon, This is the sheet for the 18F47K40 that I use here.

dave have you the asm code for MPLABX for the 18f27k40 used for the tiny bootloader

i think as i am using the 47k40 theword values will be abit differnet

Sheldon, Here is the .asm file I use here.