18F45K22 Pull Up on PortE

It seems trivial but unortunately I cannot enable the Pull Ups on the Port E <0:1> of the 45K22.

Here is my setup:

Code:

---

#CONFIG
    CONFIG  FOSC = INTIO67        ; Internal oscillator block
    CONFIG  PLLCFG = ON          ; PLL Control
    CONFIG  PRICLKEN = OFF        ; Primary clock can be disabled by software
    CONFIG  FCMEN = OFF          ; Fail-Safe Clock Monitor disabled
    CONFIG  IESO = OFF            ; Oscillator Switchover mode disabled
    CONFIG  PWRTEN = OFF          ; Power up timer disabled
    CONFIG  BOREN = SBORDIS      ; Brown-out Reset enabled in hardware only (SBOREN is disabled)
    CONFIG  BORV = 190            ; VBOR set to 1.90 V nominal
    CONFIG  WDTEN = OFF          ; WDT is always enabled. SWDTEN bit has no effect
    CONFIG  WDTPS = 32768        ; 1:32768
    CONFIG  CCP2MX = PORTC1      ; CCP2 input/output is multiplexed with RC1
    CONFIG  PBADEN = OFF          ; PORTB<5:0> pins are configured as digital I/O on Reset
    CONFIG  CCP3MX = PORTB5      ; P3A/CCP3 input/output is multiplexed with RB5
    CONFIG  HFOFST = ON          ; HFINTOSC output and ready status are not delayed by the oscillator stable status
    CONFIG  T3CMX = PORTC0        ; T3CKI is on RC0
    CONFIG  P2BMX = PORTD2        ; P2B is on RD2
    CONFIG  MCLRE = EXTMCLR      ; MCLR pin disabled, RE3 input pin enabled
    CONFIG  STVREN = ON          ; Stack full/underflow will cause Reset
    CONFIG  LVP = OFF            ; Single-Supply ICSP disabled
    CONFIG  XINST = OFF          ; Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
    CONFIG  DEBUG = OFF          ; Disabled
    CONFIG  CP0 = OFF            ; Block 0 (000800-001FFFh) not code-protected
    CONFIG  CP1 = OFF            ; Block 1 (002000-003FFFh) not code-protected
    CONFIG  CP2 = OFF            ; Block 2 (004000-005FFFh) not code-protected
    CONFIG  CP3 = OFF            ; Block 3 (006000-007FFFh) not code-protected
    CONFIG  CPB = OFF            ; Boot block (000000-0007FFh) not code-protected
    CONFIG  CPD = OFF            ; Data EEPROM not code-protected
    CONFIG  WRT0 = OFF            ; Block 0 (000800-001FFFh) not write-protected
    CONFIG  WRT1 = OFF            ; Block 1 (002000-003FFFh) not write-protected
    CONFIG  WRT2 = OFF            ; Block 2 (004000-005FFFh) not write-protected
    CONFIG  WRT3 = OFF            ; Block 3 (006000-007FFFh) not write-protected
    CONFIG  WRTC = OFF            ; Configuration registers (300000-3000FFh) not write-protected
    CONFIG  WRTB = OFF            ; Boot Block (000000-0007FFh) not write-protected
    CONFIG  WRTD = OFF            ; Data EEPROM not write-protected
    CONFIG  EBTR0 = OFF          ; Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
    CONFIG  EBTR1 = OFF          ; Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
    CONFIG  EBTR2 = OFF          ; Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
    CONFIG  EBTR3 = OFF          ; Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
    CONFIG  EBTRB = OFF          ; Boot Block (000000-0007FFh) not protected from table reads executed in other blocks
#ENDCONFIG

DEFINE OSC 64
                       
' Setup PLL for 64 MHZ
OSCCON = %01110000 ; 16 mhz (NOTE: SCS=0 so PLL works)
OSCCON2= %00000100
OSCTUNE= %01000000 ; PLL enable Mhz * 4

ANSELA = 0
ANSELB = 0
ANSELC = 0
ANSELD = 0
ANSELE = 0

' Set LCD Data port
DEFINE LCD_DREG PORTD  ' Set starting Data bit (0 or 4) if 4-bit bus
DEFINE LCD_DBIT 0      ' Set LCD Register Select port
DEFINE LCD_RSREG PORTC ' Set LCD Register Select bit
DEFINE LCD_RSBIT 2    ' Set LCD Enable port
DEFINE LCD_EREG PORTC  ' Set LCD Enable bit
DEFINE LCD_EBIT 3      ' Set LCD bus size (4 or 8 bits)
DEFINE LCD_BITS 4      ' Set number of lines on LCD
DEFINE LCD_LINES 4    ' Set command delay time in us
DEFINE LCD_COMMANDUS 1500  ' Set data delay time in us
DEFINE LCD_DATAUS 50  ' Set receive register to receiver enabled
DEFINE HSER_RCSTA 90h ' Set transmit register to transmitter enabled
DEFINE HSER_TXSTA 20h ' Set baud rate
DEFINE HSER_BAUD 9600
DEFINE HSER_SPBRG1 103
DEFINE HSER_CLROERR 1  ' Auto clear over-run errors
 
'DEFINE HSER_TXSTA 24h '9600 baud rate, BRGH=1
'DEFINE HSER_BAUD 115200
'DEFINE HSER_SPBRG1 34

BAUDCON1 = %00000000  ' bit 4 0:Needs UART, 1:No UART chip

INTCON2.7=0

WPUB.5=1

CM1CON0.7=0
CM2CON0.7=0

'PWM 1 and PWM 2 module settings
'''trisb.5=1:trisc.1=1    'disable output
'''ccptmrs0=0
'''ccptmrs1=0
'''PR2=255
''''CCP1CON=$0C
'''CCP2CON=$0C
'''CCP3CON=$0C
''''ccp1con.5=0:ccp1con.4=0:ccpr1l=0
'''ccp2con.5=1:ccp2con.4=1:ccpr2l=255
'''ccp3con.5=1:ccp3con.4=1:ccpr3l=255
''''clear
'''pir1.1=0
'''t2con=%0000101
'''while !pir1.1:wend
'''trisb.5=0:trisc.1=0    'enable output

'Initializing Port Registers
  PORTA = 0:PORTB = 0:PORTC = 0:PORTD = 0:PORTE = 0
  TRISA = 0:TRISB = 0:TRISC = 128:TRISD = 0:TRISE = %10000011

' Main Program
start:
WHILE 1
IF PORTE.1 then
    LCDOUT $FE,$80,"Card present"
ELSE
    LCDOUT $FE,$80,"Card absent "
ENDIF
WEND

END

---

It does not enable the pull ups on port E no matter what. Any help appreciated.

Ioannis

Hi Ioannis,

Looking at the datasheet DS41412F page 10, it seems to me that on the E-port only RE3 has the Pull-up function built in.

Steve

Thanks Steve.

On page 156 it shows that the TRISE register includes both port direction AND pull up setting without mention that the pull up is only on portE.3 as you clearly stated.

Missed that, and almost got me crazy.

Thanks for pointing me at page 10.
Ioannis