PBP migration from 16F88 to 16F1827
Okay, I'm overlooking something. This program worked (albeit slowly) on a 16F88.
5 analog pins sample and (after manipulation) produce a high or low to a pin. Here's the correspondence:
AN0 to B5
AN1 to B4
AN2 to B3
AN3 to B2
AN4 to B1
AN5 and AN6 each have the wiper of a different pot on them.
Now, only AN4 to B1 works correctly. B5 is stuck high all the time (from power-up), even with no signal on AN0. The three in between are off if there is no signal but stick high as soon as a small signal is applied and remain that way until power-down.
The pot on AN5 has the correct effect on the one working channel but AN6 does not appear to be working.
Here's what I had in the (totally working) 16F88 version:
DEFINE OSC 8
ANSEL= %01111111
CMCON= %00000111
OSCCON= %01110000
TRISA= %01111111
TRISB= %11000001
ADCON1.7=1
DEFINE ADC_BITS 10
DEFINE ADC_CLOCK 5
DEFINE ADC_SAMPLEUS 12
. . . and here's what I have for the 16F1827:
DEFINE OSC 32
ANSELA= %00011111
ANSELB= %11000000
OSCCON= %11110000
TRISA = %01111111
TRISB = %11000001
ADCON1.7 =1
CM1CON0.7=0
CM2CON0.7=0
DEFINE ADC_BITS 10
DEFINE ADC_CLOCK 6
DEFINE ADC_SAMPLEUS 12
What thing(s) am I failing to do?
When all else fails . . . "blinky" test!
Here it is:
@ __config _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _MCLRE_OFF & _BOREN_OFF & _FCMEN_OFF
@ __config _CONFIG2, _STVREN_OFF & _LVP_OFF
OLO VAR PORTB.5
OLM VAR PORTB.4
OMD VAR PORTB.3
OMH VAR PORTB.2
OHI VAR PORTB.1
DEFINE OSC 32
ANSELA= %00011111
ANSELB= %11000000
CCP1CON=%00000000
CCP2CON=%00000000
CCP3CON=%00000000
CCP4CON=%00000000
OSCCON= %11110000
TRISA = %01111111
TRISB = %11000001
MAIN:
OLO=1 : PAUSE 1000 : OLO=0
OLM=1 : PAUSE 1000 : OLM=0
OMD=1 : PAUSE 1000 : OMD=0
OMH=1 : PAUSE 1000 : OMH=0
OHI=1 : PAUSE 1000 : OHI=0
GOTO MAIN
END
No ADCs, no triac output, nothing but outputs low to high and back.
Results:
Each channel comes on in succession. The first four, however, than simply stay on. The fifth goes on and off exactly as you would expect.
I even tried this on a "fresh" '1827. No difference.
This is why I remain convinced that the problem hides in how I'm configuring something that affects B.2 through B.5 but permits B.1 to operate normally.