SWDTEN troubles (16F1933) [Archive]

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dsicon

- 27th September 2014, 01:55

am having troubles i can't track down, will buy a beer for anyone who can help
PIC16F1933
SWDTEN troubles

my understanding is that if i set the configuration to SWDTEN then i can turn the WDT on and off w/ bit0 of WDTCON

the programmer confirms i have "controlled by SWDTEN" in the config window

setting to WDT ON or OFF in config works as expected with regard to NAP
when WDT OFF in config
NAP 18
is sleep forever (i have IOC waking it up, works fine)
when WDT is ON
NAP 18
sleeps for 256 seconds and then moves on to next code line
both of the above are working great when i hard program WDT ON or OFF in config

but now i really need to have it both ways, sometimes NAP forever until IOC, in another section i need NAP to proceed after a time

so SWDTEN should be the ticket but i cannot get it to work
no idea if it is PBP3 or the chip, at this point i don't think it is me unless there is something i don't understand that is keeping WDT ON

it seems that i can turn WDT ON w/ WDTCON.0 = 1
but subsequently i cannot turn it off again with WDTCON.0=0
after WDTCON.0 = 0
NAP 12
just marches along after whatever time period 12 is (not long, i want it to sleep until IOC)

any ideas what might be doing that ?
by the way i can tell the bit is correct (0) it is just that WDT must be running anyway since NAP proceeds after the time

does clock switchover setting have any role ?
or Fail Safe Clock monitor (getting desperate as i have blown big time here)
both of those are off

pedja089

- 27th September 2014, 03:14

dsicon

- 27th September 2014, 19:07

If you look into .lst file you can find label called NAP.
Here is copy/paste of code that deal with WDTCON

movwf FSR0H ; Save period somewhere for a moment
movlb WDTCON >> 7 ; Point to bank
movf WDTCON, W ; Save current WDTCON value
movwf FSR0L
lslf FSR0H, W ; Get saved period and rotate it into position
iorlw 1 ; Set software WDT on
movwf WDTCON ; Set WDTCON
sleep ; Enter sleep mode
movf FSR0L, W ; Reset WDTCON to saved value
movwf WDTCON
So every time you go to nap, PBP set SWDTEN, nap for while, and then restore value that was before going to nap.
IF you_wait_for_IOC THEN
WDTCON.0=0 'Disable WDT
@ Sleep
Else
Nap 1
ENDIF

thank you!
one thing (at least :) ) confuses me about your reply
you say "PBP set SWDTEN"
but that can only be done in CONFIG1, correct ?
is your example compatible with 16F1933 or is it 18F ?

here is from my LST file
00C6 0085 06483 NAP movwf FSR0H ; Save period somewhere for a moment
00C7 0021 06484 movlb WDTCON >> 7 ; Point to bank
00C8 0817 06485 movf WDTCON, W ; Save current WDTCON value
00C9 0084 06486 movwf FSR0L
00CA 3505 06487 lslf FSR0H, W ; Get saved period and rotate it into position
00CB 3801 06488 iorlw 1 ; Set software WDT on
00CC 0097 06489 movwf WDTCON ; Set WDTCON
00CD 0063 06490 sleep ; Enter sleep mode
00CE 0804 06491 movf FSR0L, W ; Reset WDTCON to saved value
00CF 0097 06492 movwf WDTCON
00D0 2926 06493 goto DONE ; Done
06514 LIST

i will play with what i have learned here and back to you, thanks again

pedja089

- 28th September 2014, 09:07

SWDTEN is bit 0 of WDTCON register.
When using nap iorlw 1 and movwf WDTCON enables SWDTEN bit before sleep.
And WDTCON is restored after sleep.

dsicon

- 28th September 2014, 19:28

SWDTEN is bit 0 of WDTCON register.
When using nap iorlw 1 and movwf WDTCON enables SWDTEN bit before sleep.
And WDTCON is restored after sleep.

correct, SWDTEN is bit 0 of WDTCON, my usage of the term was not clear as SWDTEN is also the name one of the config settings for WDT, sorry about that

the way i read everything in the data unless config1 <4:3> is set to allow SWDTEN then SWDTEN bit in WDTCON.0 is ignored

this is from the data sheet for WDTCON
WDTE is 2 bits in CONFIG1
bit 0 SWDTEN: Software Enable/Disable for Watchdog Timer bit
If WDTE<1:0> = 00:
This bit is ignored.
If WDTE<1:0> = 01:
1 = WDT is turned on
0 = WDT is turned off
If WDTE<1:0> = 1x:
This bit is ignored.

this is what i cannot get to work correctly, have tried many things
i can turn WDT hard ON or hard OFF in config and things work as expected, but when i set WDT to SWDTEN in config the SWDTEN bit of WDTCON does not work correctly,
have tried setting it manually in parts of test code before and after NAP
i can see the WDTCON.0 being of the expected state but WDT is not turning ON and OFF following the bit

i think maybe NAP is not handling this chip correctly or maybe there is a bug in chip ?

thanks for your patience in following up on this, maybe i have missed something you have said ?

looking at the NAP ASM code it does not seem to know about the WDT config settings ? is that true ?

pedja089

- 28th September 2014, 20:50

It doesn't know... But relays on you to set WDT ON or to set WDT CONFIG to software control. If it is always on, then setting bit 0 doesn't have effect.
If you set WDT to softvare control NAP will work as expected. It ALWAYS ENABLE WDT in WDTCON and wake up after while. If you disable WDT in CONFIG1, NAP stil enables bit 0 in WDTCON but it doesnt have effect. WDT will stay off and never wake up device.
To wait for IOC, disable WDT in WDTCON, by reseting bit 0, and then use @ sleep to put device into low power mode.
To wake up pic after while just use nap.
I alredy wrote that at end of post #3.

dsicon

- 1st October 2014, 18:17

I am off this project for a short while, but i will be back on it in a week or so and follow up as this topic interests me

in the meanwhile i have done a workaround by setting CONFIG to WDT ON, then when it falls out of NAP i check IOC flag and i can tell if it timed out or got interrupted and act accordingly

this burns a tiny bit more power than i had wanted (as it wakes up periodically) but i have big battery and i think it will be insignificant compared to self discharge

pedja089, i will try your @ sleep suggestion when i start project again