Demon
- 14th January 2012, 01:36
It's not always apparent to beginners to decide exactly which config to use; sometimes it's not clear what ASM config goes with what in the PIC datasheet, sometimes you don't know what file in what folder you're supposed to use as reference, sometimes you're not sure what the default value is or where to get it and sometimes you're just too lazy to look it up yourself. :)
This thread is to help us simple folk with a list of PICs, oscillator speed and configs until you know what files to use and how to read the datasheet.
This is what I'm using in my current project:
PIC 18F4550, 20 MHz external oscillator, USB operation, not using power from USB cord and the Lab X1
PBP 2.60C
MPASM v4.02
This goes at the top of my PBP program. You can group them all in ASM/ENDASM if you prefer that method:
@ __CONFIG _CONFIG1L, _PLLDIV_5_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L
@ __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H
@ __CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOR_ON_2L & _BORV_43_2L & _VREGEN_ON_2L
@ __CONFIG _CONFIG2H, _WDT_OFF_2H
@ __CONFIG _CONFIG3H, _CCP2MX_ON_3H & _PBADEN_OFF_3H & _LPT1OSC_OFF_3H & _MCLRE_ON_3H
@ __CONFIG _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _ICPRT_OFF_4L & _XINST_OFF_4L
DEFINE OSC 48
Comment out the default configs in 18F4550.INC in PBP folder with a semi-colon like this:
NOLIST
ifdef PM_USED
LIST
"Error: PM does not support this device. Use MPASM."
NOLIST
else
LIST
LIST p = 18F4550, r = dec, w = -311, w = -230, f = inhx32
INCLUDE "P18F4550.INC" ; MPASM Header
; __CONFIG _CONFIG1L, _PLLDIV_5_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L
; __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
; __CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOR_ON_2L & _BORV_3_2L & _VREGEN_ON_2L
; __CONFIG _CONFIG2H, _WDT_ON_2H & _WDTPS_512_2H
; __CONFIG _CONFIG3H, _CCP2MX_ON_3H & _PBADEN_OFF_3H & _LPT1OSC_OFF_3H & _MCLRE_ON_3H
; __CONFIG _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _ICPRT_OFF_4L & _XINST_OFF_4L
NOLIST
endif
LIST
These are the available options at the bottom of P18F4550 in MPASM folder:
;----- CONFIG1L Options --------------------------------------------------
_PLLDIV_1_1L ; No divide (4MHz input)
_PLLDIV_2_1L ; Divide by 2 (8MHz input)
_PLLDIV_3_1L ; Divide by 3 (12MHz input)
_PLLDIV_4_1L ; Divide by 4 (16MHz input)
_PLLDIV_5_1L ; Divide by 5 (20MHz input)
_PLLDIV_6_1L ; Divide by 6 (24MHz input)
_PLLDIV_10_1L ; Divide by 10 (40MHz input)
_PLLDIV_12_1L ; Divide by 12 (48MHz input)
_CPUDIV_OSC1_PLL2_1L ; [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
_CPUDIV_OSC2_PLL3_1L ; [OSC1/OSC2 Src: /2][96MHz PLL Src: /3]
_CPUDIV_OSC3_PLL4_1L ; [OSC1/OSC2 Src: /3][96MHz PLL Src: /4]
_CPUDIV_OSC4_PLL6_1L ; [OSC1/OSC2 Src: /4][96MHz PLL Src: /6]
_USBDIV_1_1L ; Clock source from OSC1/OSC2
_USBDIV_2_1L ; Clock source from 96MHz PLL/2
;----- CONFIG1H Options --------------------------------------------------
_FOSC_XT_XT_1H ; XT oscillator, XT used by USB
_FOSC_XTPLL_XT_1H ; XT oscillator, PLL enabled, XT used by USB
_FOSC_ECIO_EC_1H ; External clock, port function on RA6, EC used by USB
_FOSC_EC_EC_1H ; External clock, CLKOUT on RA6, EC used by USB
_FOSC_ECPLLIO_EC_1H ; External clock, PLL enabled, port function on RA6, EC used by USB
_FOSC_ECPLL_EC_1H ; External clock, PLL enabled, CLKOUT on RA6, EC used by USB
_FOSC_INTOSCIO_EC_1H ; Internal oscillator, port function on RA6, EC used by USB
_FOSC_INTOSC_EC_1H ; Internal oscillator, CLKOUT on RA6, EC used by USB
_FOSC_INTOSC_XT_1H ; Internal oscillator, XT used by USB
_FOSC_INTOSC_HS_1H ; Internal oscillator, HS used by USB
_FOSC_HS_1H ; HS oscillator, HS used by USB
_FOSC_HSPLL_HS_1H ; HS oscillator, PLL enabled, HS used by USB
_FCMEM_OFF_1H ; Disabled
_FCMEM_ON_1H ; Enabled
_IESO_OFF_1H ; Disabled
_IESO_ON_1H ; Enabled
;----- CONFIG2L Options --------------------------------------------------
_PWRT_ON_2L ; Enabled
_PWRT_OFF_2L ; Disabled
_BOR_OFF_2L ; Disabled
_BOR_SOFT_2L ; Controled by SBOREN
_BOR_ON_ACTIVE_2L ; Enabled when the device is not in SLEEP, SBOREN bit is disabled
_BOR_ON_2L ; Enabled, SBOREN bit is disabled
_BORV_46_2L ; 4.6V
_BORV_43_2L ; 4.3V
_BORV_28_2L ; 2.8V
_BORV_21_2L ; 2.1V
_VREGEN_OFF_2L ; Disabled
_VREGEN_ON_2L ; Enabled
;----- CONFIG2H Options --------------------------------------------------
_WDT_OFF_2H ; HW Disabled - SW Controlled
_WDT_ON_2H ; HW Enabled - SW Disabled
_WDTPS_1_2H ; 1:1
_WDTPS_2_2H ; 1:2
_WDTPS_4_2H ; 1:4
_WDTPS_8_2H ; 1:8
_WDTPS_16_2H ; 1:16
_WDTPS_32_2H ; 1:32
_WDTPS_64_2H ; 1:64
_WDTPS_128_2H ; 1:128
_WDTPS_256_2H ; 1:256
_WDTPS_512_2H ; 1:512
_WDTPS_1024_2H ; 1:1024
_WDTPS_2048_2H ; 1:2048
_WDTPS_4096_2H ; 1:4096
_WDTPS_8192_2H ; 1:8192
_WDTPS_16384_2H ; 1:16384
_WDTPS_32768_2H ; 1:32768
;----- CONFIG3H Options --------------------------------------------------
_MCLRE_OFF_3H ; Disabled
_MCLRE_ON_3H ; Enabled
_LPT1OSC_OFF_3H ; Timer1 oscillator configured for high power
_LPT1OSC_ON_3H ; Timer1 oscillator configured for low power
_PBADEN_OFF_3H ; PortB<4:0> pins are configured as digital I/O on RESET
_PBADEN_ON_3H ; PortB<4:0> pins are configured as analog input on RESET
_CCP2MX_OFF_3H ; CCP2 input/output is multiplexed with RB3
_CCP2MX_ON_3H ; CCP2 input/output is multiplexed with RC1
;----- CONFIG4L Options --------------------------------------------------
_STVREN_OFF_4L ; Disabled
_STVREN_ON_4L ; Enabled
_LVP_OFF_4L ; Disabled
_LVP_ON_4L ; Enabled
_ICPRT_OFF_4L ; Disabled
_ICPRT_ON_4L ; Enabled
_XINST_OFF_4L ; Disabled
_XINST_ON_4L ; Enabled
_DEBUG_ON_4L ; Enabled
_DEBUG_OFF_4L ; Disabled
;----- CONFIG5L Options --------------------------------------------------
_CP0_ON_5L ; Enabled
_CP0_OFF_5L ; Disabled
_CP1_ON_5L ; Enabled
_CP1_OFF_5L ; Disabled
_CP2_ON_5L ; Enabled
_CP2_OFF_5L ; Disabled
_CP3_ON_5L ; Enabled
_CP3_OFF_5L ; Disabled
;----- CONFIG5H Options --------------------------------------------------
_CPB_ON_5H ; Enabled
_CPB_OFF_5H ; Disabled
_CPD_ON_5H ; Enabled
_CPD_OFF_5H ; Disabled
;----- CONFIG6L Options --------------------------------------------------
_WRT0_ON_6L ; Enabled
_WRT0_OFF_6L ; Disabled
_WRT1_ON_6L ; Enabled
_WRT1_OFF_6L ; Disabled
_WRT2_ON_6L ; Enabled
_WRT2_OFF_6L ; Disabled
_WRT3_ON_6L ; Enabled
_WRT3_OFF_6L ; Disabled
;----- CONFIG6H Options --------------------------------------------------
_WRTB_ON_6H ; Enabled
_WRTB_OFF_6H ; Disabled
_WRTC_ON_6H ; Enabled
_WRTC_OFF_6H ; Disabled
_WRTD_ON_6H ; Enabled
_WRTD_OFF_6H ; Disabled
;----- CONFIG7L Options --------------------------------------------------
_EBTR0_ON_7L ; Enabled
_EBTR0_OFF_7L ; Disabled
_EBTR1_ON_7L ; Enabled
_EBTR1_OFF_7L ; Disabled
_EBTR2_ON_7L ; Enabled
_EBTR2_OFF_7L ; Disabled
_EBTR3_ON_7L ; Enabled
_EBTR3_OFF_7L ; Disabled
;----- CONFIG7H Options --------------------------------------------------
_EBTRB_ON_7H ; Enabled
_EBTRB_OFF_7H ; Disabled
And this is what they mean further up P18F4550.INC:
; 96MHz PLL Prescaler:
; PLLDIV = 1 No divide (4MHz input)
; PLLDIV = 2 Divide by 2 (8MHz input)
; PLLDIV = 3 Divide by 3 (12MHz input)
; PLLDIV = 4 Divide by 4 (16MHz input)
; PLLDIV = 5 Divide by 5 (20MHz input)
; PLLDIV = 6 Divide by 6 (24MHz input)
; PLLDIV = 10 Divide by 10 (40MHz input)
; PLLDIV = 12 Divide by 12 (48MHz input)
;
; CPU System Clock Postscaler:
; CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
; CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz PLL Src: /3]
; CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz PLL Src: /4]
; CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz PLL Src: /6]
;
; Full-Speed USB Clock Source Selection:
; USBDIV = 1 Clock source from OSC1/OSC2
; USBDIV = 2 Clock source from 96MHz PLL/2
;
; Oscillator Selection bits:
; FOSC = XT_XT XT oscillator, XT used by USB
; FOSC = XTPLL_XT XT oscillator, PLL enabled, XT used by USB
; FOSC = ECIO_EC External clock, port function on RA6, EC used by USB
; FOSC = EC_EC External clock, CLKOUT on RA6, EC used by USB
; FOSC = ECPLLIO_EC External clock, PLL enabled, port function on RA6, EC used by USB
; FOSC = ECPLL_EC External clock, PLL enabled, CLKOUT on RA6, EC used by USB
; FOSC = INTOSCIO_EC Internal oscillator, port function on RA6, EC used by USB
; FOSC = INTOSC_EC Internal oscillator, CLKOUT on RA6, EC used by USB
; FOSC = INTOSC_XT Internal oscillator, XT used by USB
; FOSC = INTOSC_HS Internal oscillator, HS used by USB
; FOSC = HS HS oscillator, HS used by USB
; FOSC = HSPLL_HS HS oscillator, PLL enabled, HS used by USB
;
; Fail Safe Clock Monitor:
; FCMEM = OFF Disabled
; FCMEM = ON Enabled
;
; Internal/External Switch Over:
; IESO = OFF Disabled
; IESO = ON Enabled
;
; Power Up Timer:
; PWRT = ON Enabled
; PWRT = OFF Disabled
;
; Brown Out Reset:
; BOR = OFF Disabled
; BOR = SOFT Controled by SBOREN
; BOR = ON_ACTIVE Enabled when the device is not in SLEEP, SBOREN bit is disabled
; BOR = ON Enabled, SBOREN bit is disabled
;
; Brown Out Voltage:
; BORV = 46 4.6V
; BORV = 43 4.3V
; BORV = 28 2.8V
; BORV = 21 2.1V
;
; USB Voltage Regulator Enable:
; VREGEN = OFF Disabled
; VREGEN = ON Enabled
;
; Watchdog Timer:
; WDT = OFF HW Disabled - SW Controlled
; WDT = ON HW Enabled - SW Disabled
;
; Watchdog Postscaler:
; WDTPS = 1 1:1
; WDTPS = 2 1:2
; WDTPS = 4 1:4
; WDTPS = 8 1:8
; WDTPS = 16 1:16
; WDTPS = 32 1:32
; WDTPS = 64 1:64
; WDTPS = 128 1:128
; WDTPS = 256 1:256
; WDTPS = 512 1:512
; WDTPS = 1024 1:1024
; WDTPS = 2048 1:2048
; WDTPS = 4096 1:4096
; WDTPS = 8192 1:8192
; WDTPS = 16384 1:16384
; WDTPS = 32768 1:32768
;
; MCLR Enable:
; MCLRE = OFF Disabled
; MCLRE = ON Enabled
;
; Low Power Timer1 Oscillator Enable:
; LPT1OSC = OFF Timer1 oscillator configured for high power
; LPT1OSC = ON Timer1 oscillator configured for low power
;
; Port B A/D Enable:
; PBADEN = OFF PortB<4:0> pins are configured as digital I/O on RESET
; PBADEN = ON PortB<4:0> pins are configured as analog input on RESET
;
; CCP2 Mux bit:
; CCP2MX = OFF CCP2 input/output is multiplexed with RB3
; CCP2MX = ON CCP2 input/output is multiplexed with RC1
;
; Stack Overflow Reset:
; STVREN = OFF Disabled
; STVREN = ON Enabled
;
; Low Voltage ICSP:
; LVP = OFF Disabled
; LVP = ON Enabled
;
; Dedicated In-Circuit Debug/Programming Enable:
; ICPRT = OFF Disabled
; ICPRT = ON Enabled
;
; Extended Instruction Set Enable:
; XINST = OFF Disabled
; XINST = ON Enabled
;
; Background Debugger Enable:
; DEBUG = ON Enabled
; DEBUG = OFF Disabled
;
; Code Protection Block 0:
; CP0 = ON Enabled
; CP0 = OFF Disabled
;
; Code Protection Block 1:
; CP1 = ON Enabled
; CP1 = OFF Disabled
;
; Code Protection Block 2:
; CP2 = ON Enabled
; CP2 = OFF Disabled
;
; Code Protection Block 3:
; CP3 = ON Enabled
; CP3 = OFF Disabled
;
; Boot Block Code Protection:
; CPB = ON Enabled
; CPB = OFF Disabled
;
; Data EEPROM Code Protection:
; CPD = ON Enabled
; CPD = OFF Disabled
;
; Write Protection Block 0:
; WRT0 = ON Enabled
; WRT0 = OFF Disabled
;
; Write Protection Block 1:
; WRT1 = ON Enabled
; WRT1 = OFF Disabled
;
; Write Protection Block 2:
; WRT2 = ON Enabled
; WRT2 = OFF Disabled
;
; Write Protection Block 3:
; WRT3 = ON Enabled
; WRT3 = OFF Disabled
;
; Boot Block Write Protection:
; WRTB = ON Enabled
; WRTB = OFF Disabled
;
; Configuration Register Write Protection:
; WRTC = ON Enabled
; WRTC = OFF Disabled
;
; Data EEPROM Write Protection:
; WRTD = ON Enabled
; WRTD = OFF Disabled
;
; Table Read Protection Block 0:
; EBTR0 = ON Enabled
; EBTR0 = OFF Disabled
;
; Table Read Protection Block 1:
; EBTR1 = ON Enabled
; EBTR1 = OFF Disabled
;
; Table Read Protection Block 2:
; EBTR2 = ON Enabled
; EBTR2 = OFF Disabled
;
; Table Read Protection Block 3:
; EBTR3 = ON Enabled
; EBTR3 = OFF Disabled
;
; Boot Block Table Read Protection:
; EBTRB = ON Enabled
; EBTRB = OFF Disabled
I haven't figured yet where the default values are set. You probably have to go through the datasheet for that...
One thing people don't realize is that comments don't take up any space on a PIC (unless you ENABLE Insert Source File Comments in MicroCode Studio under VIEW / COMPILE AND PROGRAM). Feel free to put as many comments at the top (or bottom) of your program if it helps you remember what config does what.
I like to list them all so I don't have to go back to the datasheet/file when I want to change something.
Robert
:)
Note: My first version of PBP came on a diskette and I still consider myself a beginner.
This thread is to help us simple folk with a list of PICs, oscillator speed and configs until you know what files to use and how to read the datasheet.
This is what I'm using in my current project:
PIC 18F4550, 20 MHz external oscillator, USB operation, not using power from USB cord and the Lab X1
PBP 2.60C
MPASM v4.02
This goes at the top of my PBP program. You can group them all in ASM/ENDASM if you prefer that method:
@ __CONFIG _CONFIG1L, _PLLDIV_5_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L
@ __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H
@ __CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOR_ON_2L & _BORV_43_2L & _VREGEN_ON_2L
@ __CONFIG _CONFIG2H, _WDT_OFF_2H
@ __CONFIG _CONFIG3H, _CCP2MX_ON_3H & _PBADEN_OFF_3H & _LPT1OSC_OFF_3H & _MCLRE_ON_3H
@ __CONFIG _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _ICPRT_OFF_4L & _XINST_OFF_4L
DEFINE OSC 48
Comment out the default configs in 18F4550.INC in PBP folder with a semi-colon like this:
NOLIST
ifdef PM_USED
LIST
"Error: PM does not support this device. Use MPASM."
NOLIST
else
LIST
LIST p = 18F4550, r = dec, w = -311, w = -230, f = inhx32
INCLUDE "P18F4550.INC" ; MPASM Header
; __CONFIG _CONFIG1L, _PLLDIV_5_1L & _CPUDIV_OSC1_PLL2_1L & _USBDIV_2_1L
; __CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H & _FCMEN_OFF_1H & _IESO_OFF_1H
; __CONFIG _CONFIG2L, _PWRT_OFF_2L & _BOR_ON_2L & _BORV_3_2L & _VREGEN_ON_2L
; __CONFIG _CONFIG2H, _WDT_ON_2H & _WDTPS_512_2H
; __CONFIG _CONFIG3H, _CCP2MX_ON_3H & _PBADEN_OFF_3H & _LPT1OSC_OFF_3H & _MCLRE_ON_3H
; __CONFIG _CONFIG4L, _STVREN_ON_4L & _LVP_OFF_4L & _ICPRT_OFF_4L & _XINST_OFF_4L
NOLIST
endif
LIST
These are the available options at the bottom of P18F4550 in MPASM folder:
;----- CONFIG1L Options --------------------------------------------------
_PLLDIV_1_1L ; No divide (4MHz input)
_PLLDIV_2_1L ; Divide by 2 (8MHz input)
_PLLDIV_3_1L ; Divide by 3 (12MHz input)
_PLLDIV_4_1L ; Divide by 4 (16MHz input)
_PLLDIV_5_1L ; Divide by 5 (20MHz input)
_PLLDIV_6_1L ; Divide by 6 (24MHz input)
_PLLDIV_10_1L ; Divide by 10 (40MHz input)
_PLLDIV_12_1L ; Divide by 12 (48MHz input)
_CPUDIV_OSC1_PLL2_1L ; [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
_CPUDIV_OSC2_PLL3_1L ; [OSC1/OSC2 Src: /2][96MHz PLL Src: /3]
_CPUDIV_OSC3_PLL4_1L ; [OSC1/OSC2 Src: /3][96MHz PLL Src: /4]
_CPUDIV_OSC4_PLL6_1L ; [OSC1/OSC2 Src: /4][96MHz PLL Src: /6]
_USBDIV_1_1L ; Clock source from OSC1/OSC2
_USBDIV_2_1L ; Clock source from 96MHz PLL/2
;----- CONFIG1H Options --------------------------------------------------
_FOSC_XT_XT_1H ; XT oscillator, XT used by USB
_FOSC_XTPLL_XT_1H ; XT oscillator, PLL enabled, XT used by USB
_FOSC_ECIO_EC_1H ; External clock, port function on RA6, EC used by USB
_FOSC_EC_EC_1H ; External clock, CLKOUT on RA6, EC used by USB
_FOSC_ECPLLIO_EC_1H ; External clock, PLL enabled, port function on RA6, EC used by USB
_FOSC_ECPLL_EC_1H ; External clock, PLL enabled, CLKOUT on RA6, EC used by USB
_FOSC_INTOSCIO_EC_1H ; Internal oscillator, port function on RA6, EC used by USB
_FOSC_INTOSC_EC_1H ; Internal oscillator, CLKOUT on RA6, EC used by USB
_FOSC_INTOSC_XT_1H ; Internal oscillator, XT used by USB
_FOSC_INTOSC_HS_1H ; Internal oscillator, HS used by USB
_FOSC_HS_1H ; HS oscillator, HS used by USB
_FOSC_HSPLL_HS_1H ; HS oscillator, PLL enabled, HS used by USB
_FCMEM_OFF_1H ; Disabled
_FCMEM_ON_1H ; Enabled
_IESO_OFF_1H ; Disabled
_IESO_ON_1H ; Enabled
;----- CONFIG2L Options --------------------------------------------------
_PWRT_ON_2L ; Enabled
_PWRT_OFF_2L ; Disabled
_BOR_OFF_2L ; Disabled
_BOR_SOFT_2L ; Controled by SBOREN
_BOR_ON_ACTIVE_2L ; Enabled when the device is not in SLEEP, SBOREN bit is disabled
_BOR_ON_2L ; Enabled, SBOREN bit is disabled
_BORV_46_2L ; 4.6V
_BORV_43_2L ; 4.3V
_BORV_28_2L ; 2.8V
_BORV_21_2L ; 2.1V
_VREGEN_OFF_2L ; Disabled
_VREGEN_ON_2L ; Enabled
;----- CONFIG2H Options --------------------------------------------------
_WDT_OFF_2H ; HW Disabled - SW Controlled
_WDT_ON_2H ; HW Enabled - SW Disabled
_WDTPS_1_2H ; 1:1
_WDTPS_2_2H ; 1:2
_WDTPS_4_2H ; 1:4
_WDTPS_8_2H ; 1:8
_WDTPS_16_2H ; 1:16
_WDTPS_32_2H ; 1:32
_WDTPS_64_2H ; 1:64
_WDTPS_128_2H ; 1:128
_WDTPS_256_2H ; 1:256
_WDTPS_512_2H ; 1:512
_WDTPS_1024_2H ; 1:1024
_WDTPS_2048_2H ; 1:2048
_WDTPS_4096_2H ; 1:4096
_WDTPS_8192_2H ; 1:8192
_WDTPS_16384_2H ; 1:16384
_WDTPS_32768_2H ; 1:32768
;----- CONFIG3H Options --------------------------------------------------
_MCLRE_OFF_3H ; Disabled
_MCLRE_ON_3H ; Enabled
_LPT1OSC_OFF_3H ; Timer1 oscillator configured for high power
_LPT1OSC_ON_3H ; Timer1 oscillator configured for low power
_PBADEN_OFF_3H ; PortB<4:0> pins are configured as digital I/O on RESET
_PBADEN_ON_3H ; PortB<4:0> pins are configured as analog input on RESET
_CCP2MX_OFF_3H ; CCP2 input/output is multiplexed with RB3
_CCP2MX_ON_3H ; CCP2 input/output is multiplexed with RC1
;----- CONFIG4L Options --------------------------------------------------
_STVREN_OFF_4L ; Disabled
_STVREN_ON_4L ; Enabled
_LVP_OFF_4L ; Disabled
_LVP_ON_4L ; Enabled
_ICPRT_OFF_4L ; Disabled
_ICPRT_ON_4L ; Enabled
_XINST_OFF_4L ; Disabled
_XINST_ON_4L ; Enabled
_DEBUG_ON_4L ; Enabled
_DEBUG_OFF_4L ; Disabled
;----- CONFIG5L Options --------------------------------------------------
_CP0_ON_5L ; Enabled
_CP0_OFF_5L ; Disabled
_CP1_ON_5L ; Enabled
_CP1_OFF_5L ; Disabled
_CP2_ON_5L ; Enabled
_CP2_OFF_5L ; Disabled
_CP3_ON_5L ; Enabled
_CP3_OFF_5L ; Disabled
;----- CONFIG5H Options --------------------------------------------------
_CPB_ON_5H ; Enabled
_CPB_OFF_5H ; Disabled
_CPD_ON_5H ; Enabled
_CPD_OFF_5H ; Disabled
;----- CONFIG6L Options --------------------------------------------------
_WRT0_ON_6L ; Enabled
_WRT0_OFF_6L ; Disabled
_WRT1_ON_6L ; Enabled
_WRT1_OFF_6L ; Disabled
_WRT2_ON_6L ; Enabled
_WRT2_OFF_6L ; Disabled
_WRT3_ON_6L ; Enabled
_WRT3_OFF_6L ; Disabled
;----- CONFIG6H Options --------------------------------------------------
_WRTB_ON_6H ; Enabled
_WRTB_OFF_6H ; Disabled
_WRTC_ON_6H ; Enabled
_WRTC_OFF_6H ; Disabled
_WRTD_ON_6H ; Enabled
_WRTD_OFF_6H ; Disabled
;----- CONFIG7L Options --------------------------------------------------
_EBTR0_ON_7L ; Enabled
_EBTR0_OFF_7L ; Disabled
_EBTR1_ON_7L ; Enabled
_EBTR1_OFF_7L ; Disabled
_EBTR2_ON_7L ; Enabled
_EBTR2_OFF_7L ; Disabled
_EBTR3_ON_7L ; Enabled
_EBTR3_OFF_7L ; Disabled
;----- CONFIG7H Options --------------------------------------------------
_EBTRB_ON_7H ; Enabled
_EBTRB_OFF_7H ; Disabled
And this is what they mean further up P18F4550.INC:
; 96MHz PLL Prescaler:
; PLLDIV = 1 No divide (4MHz input)
; PLLDIV = 2 Divide by 2 (8MHz input)
; PLLDIV = 3 Divide by 3 (12MHz input)
; PLLDIV = 4 Divide by 4 (16MHz input)
; PLLDIV = 5 Divide by 5 (20MHz input)
; PLLDIV = 6 Divide by 6 (24MHz input)
; PLLDIV = 10 Divide by 10 (40MHz input)
; PLLDIV = 12 Divide by 12 (48MHz input)
;
; CPU System Clock Postscaler:
; CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
; CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz PLL Src: /3]
; CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz PLL Src: /4]
; CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz PLL Src: /6]
;
; Full-Speed USB Clock Source Selection:
; USBDIV = 1 Clock source from OSC1/OSC2
; USBDIV = 2 Clock source from 96MHz PLL/2
;
; Oscillator Selection bits:
; FOSC = XT_XT XT oscillator, XT used by USB
; FOSC = XTPLL_XT XT oscillator, PLL enabled, XT used by USB
; FOSC = ECIO_EC External clock, port function on RA6, EC used by USB
; FOSC = EC_EC External clock, CLKOUT on RA6, EC used by USB
; FOSC = ECPLLIO_EC External clock, PLL enabled, port function on RA6, EC used by USB
; FOSC = ECPLL_EC External clock, PLL enabled, CLKOUT on RA6, EC used by USB
; FOSC = INTOSCIO_EC Internal oscillator, port function on RA6, EC used by USB
; FOSC = INTOSC_EC Internal oscillator, CLKOUT on RA6, EC used by USB
; FOSC = INTOSC_XT Internal oscillator, XT used by USB
; FOSC = INTOSC_HS Internal oscillator, HS used by USB
; FOSC = HS HS oscillator, HS used by USB
; FOSC = HSPLL_HS HS oscillator, PLL enabled, HS used by USB
;
; Fail Safe Clock Monitor:
; FCMEM = OFF Disabled
; FCMEM = ON Enabled
;
; Internal/External Switch Over:
; IESO = OFF Disabled
; IESO = ON Enabled
;
; Power Up Timer:
; PWRT = ON Enabled
; PWRT = OFF Disabled
;
; Brown Out Reset:
; BOR = OFF Disabled
; BOR = SOFT Controled by SBOREN
; BOR = ON_ACTIVE Enabled when the device is not in SLEEP, SBOREN bit is disabled
; BOR = ON Enabled, SBOREN bit is disabled
;
; Brown Out Voltage:
; BORV = 46 4.6V
; BORV = 43 4.3V
; BORV = 28 2.8V
; BORV = 21 2.1V
;
; USB Voltage Regulator Enable:
; VREGEN = OFF Disabled
; VREGEN = ON Enabled
;
; Watchdog Timer:
; WDT = OFF HW Disabled - SW Controlled
; WDT = ON HW Enabled - SW Disabled
;
; Watchdog Postscaler:
; WDTPS = 1 1:1
; WDTPS = 2 1:2
; WDTPS = 4 1:4
; WDTPS = 8 1:8
; WDTPS = 16 1:16
; WDTPS = 32 1:32
; WDTPS = 64 1:64
; WDTPS = 128 1:128
; WDTPS = 256 1:256
; WDTPS = 512 1:512
; WDTPS = 1024 1:1024
; WDTPS = 2048 1:2048
; WDTPS = 4096 1:4096
; WDTPS = 8192 1:8192
; WDTPS = 16384 1:16384
; WDTPS = 32768 1:32768
;
; MCLR Enable:
; MCLRE = OFF Disabled
; MCLRE = ON Enabled
;
; Low Power Timer1 Oscillator Enable:
; LPT1OSC = OFF Timer1 oscillator configured for high power
; LPT1OSC = ON Timer1 oscillator configured for low power
;
; Port B A/D Enable:
; PBADEN = OFF PortB<4:0> pins are configured as digital I/O on RESET
; PBADEN = ON PortB<4:0> pins are configured as analog input on RESET
;
; CCP2 Mux bit:
; CCP2MX = OFF CCP2 input/output is multiplexed with RB3
; CCP2MX = ON CCP2 input/output is multiplexed with RC1
;
; Stack Overflow Reset:
; STVREN = OFF Disabled
; STVREN = ON Enabled
;
; Low Voltage ICSP:
; LVP = OFF Disabled
; LVP = ON Enabled
;
; Dedicated In-Circuit Debug/Programming Enable:
; ICPRT = OFF Disabled
; ICPRT = ON Enabled
;
; Extended Instruction Set Enable:
; XINST = OFF Disabled
; XINST = ON Enabled
;
; Background Debugger Enable:
; DEBUG = ON Enabled
; DEBUG = OFF Disabled
;
; Code Protection Block 0:
; CP0 = ON Enabled
; CP0 = OFF Disabled
;
; Code Protection Block 1:
; CP1 = ON Enabled
; CP1 = OFF Disabled
;
; Code Protection Block 2:
; CP2 = ON Enabled
; CP2 = OFF Disabled
;
; Code Protection Block 3:
; CP3 = ON Enabled
; CP3 = OFF Disabled
;
; Boot Block Code Protection:
; CPB = ON Enabled
; CPB = OFF Disabled
;
; Data EEPROM Code Protection:
; CPD = ON Enabled
; CPD = OFF Disabled
;
; Write Protection Block 0:
; WRT0 = ON Enabled
; WRT0 = OFF Disabled
;
; Write Protection Block 1:
; WRT1 = ON Enabled
; WRT1 = OFF Disabled
;
; Write Protection Block 2:
; WRT2 = ON Enabled
; WRT2 = OFF Disabled
;
; Write Protection Block 3:
; WRT3 = ON Enabled
; WRT3 = OFF Disabled
;
; Boot Block Write Protection:
; WRTB = ON Enabled
; WRTB = OFF Disabled
;
; Configuration Register Write Protection:
; WRTC = ON Enabled
; WRTC = OFF Disabled
;
; Data EEPROM Write Protection:
; WRTD = ON Enabled
; WRTD = OFF Disabled
;
; Table Read Protection Block 0:
; EBTR0 = ON Enabled
; EBTR0 = OFF Disabled
;
; Table Read Protection Block 1:
; EBTR1 = ON Enabled
; EBTR1 = OFF Disabled
;
; Table Read Protection Block 2:
; EBTR2 = ON Enabled
; EBTR2 = OFF Disabled
;
; Table Read Protection Block 3:
; EBTR3 = ON Enabled
; EBTR3 = OFF Disabled
;
; Boot Block Table Read Protection:
; EBTRB = ON Enabled
; EBTRB = OFF Disabled
I haven't figured yet where the default values are set. You probably have to go through the datasheet for that...
One thing people don't realize is that comments don't take up any space on a PIC (unless you ENABLE Insert Source File Comments in MicroCode Studio under VIEW / COMPILE AND PROGRAM). Feel free to put as many comments at the top (or bottom) of your program if it helps you remember what config does what.
I like to list them all so I don't have to go back to the datasheet/file when I want to change something.
Robert
:)
Note: My first version of PBP came on a diskette and I still consider myself a beginner.